summaryrefslogtreecommitdiff
path: root/gr-digital/python
diff options
context:
space:
mode:
Diffstat (limited to 'gr-digital/python')
-rw-r--r--gr-digital/python/crc.py6
-rwxr-xr-xgr-digital/python/qa_crc32.py26
-rwxr-xr-xgr-digital/python/qa_simple_framer.py27
3 files changed, 29 insertions, 30 deletions
diff --git a/gr-digital/python/crc.py b/gr-digital/python/crc.py
index 198ab059f5..e228faaa98 100644
--- a/gr-digital/python/crc.py
+++ b/gr-digital/python/crc.py
@@ -20,11 +20,11 @@
#
from gnuradio import gru
-import digital_swig
+import digital_swig as digital
import struct
def gen_and_append_crc32(s):
- crc = digital_swig.crc32(s)
+ crc = digital.crc32(s)
return s + struct.pack(">I", gru.hexint(crc) & 0xFFFFFFFF)
def check_crc32(s):
@@ -32,7 +32,7 @@ def check_crc32(s):
return (False, '')
msg = s[:-4]
#print "msg = '%s'" % (msg,)
- actual = digital_swig.crc32(msg)
+ actual = digital.crc32(msg)
(expected,) = struct.unpack(">I", s[-4:])
# print "actual =", hex(actual), "expected =", hex(expected)
return (actual == expected, msg)
diff --git a/gr-digital/python/qa_crc32.py b/gr-digital/python/qa_crc32.py
index f86813f3f3..cd4006b1d3 100755
--- a/gr-digital/python/qa_crc32.py
+++ b/gr-digital/python/qa_crc32.py
@@ -21,40 +21,40 @@
#
from gnuradio import gr, gr_unittest
-import digital_swig
+import digital_swig as digital
import random, cmath
class test_crc32(gr_unittest.TestCase):
- def setUp (self):
- self.tb = gr.top_block ()
+ def setUp(self):
+ self.tb = gr.top_block()
- def tearDown (self):
+ def tearDown(self):
self.tb = None
- def test01 (self):
+ def test01(self):
data = 100*"0"
expected_result = 2943744955
- result = digital_swig.crc32(data)
+ result = digital.crc32(data)
#print hex(result)
- self.assertEqual (expected_result, result)
+ self.assertEqual(expected_result, result)
- def test02 (self):
+ def test02(self):
data = 100*"1"
expected_result = 2326594156
- result = digital_swig.crc32(data)
+ result = digital.crc32(data)
#print hex(result)
- self.assertEqual (expected_result, result)
+ self.assertEqual(expected_result, result)
- def test03 (self):
+ def test03(self):
data = 10*"0123456789"
expected_result = 3774345973
- result = digital_swig.crc32(data)
+ result = digital.crc32(data)
#print hex(result)
- self.assertEqual (expected_result, result)
+ self.assertEqual(expected_result, result)
if __name__ == '__main__':
gr_unittest.run(test_crc32, "test_crc32.xml")
diff --git a/gr-digital/python/qa_simple_framer.py b/gr-digital/python/qa_simple_framer.py
index 09b2d329b2..f8c894da28 100755
--- a/gr-digital/python/qa_simple_framer.py
+++ b/gr-digital/python/qa_simple_framer.py
@@ -24,15 +24,15 @@ from gnuradio import gr, gr_unittest
import digital_swig as digital
import math
-class test_simple_framer (gr_unittest.TestCase):
+class test_simple_framer(gr_unittest.TestCase):
- def setUp (self):
- self.tb = gr.top_block ()
+ def setUp(self):
+ self.tb = gr.top_block()
- def tearDown (self):
+ def tearDown(self):
self.tb = None
- def test_simple_framer_001 (self):
+ def test_simple_framer_001(self):
src_data = (0x00, 0x11, 0x22, 0x33,
0x44, 0x55, 0x66, 0x77,
0x88, 0x99, 0xaa, 0xbb,
@@ -44,15 +44,14 @@ class test_simple_framer (gr_unittest.TestCase):
0xac, 0xdd, 0xa4, 0xe2, 0xf2, 0x8c, 0x20, 0xfc, 0x02, 0x88, 0x99, 0xaa, 0xbb, 0x55,
0xac, 0xdd, 0xa4, 0xe2, 0xf2, 0x8c, 0x20, 0xfc, 0x03, 0xcc, 0xdd, 0xee, 0xff, 0x55)
- src = gr.vector_source_b (src_data)
- op = digital.simple_framer (4)
- dst = gr.vector_sink_b ()
- self.tb.connect (src, op)
- self.tb.connect (op, dst)
- self.tb.run ()
- result_data = dst.data ()
- self.assertEqual (expected_result, result_data)
-
+ src = gr.vector_source_b(src_data)
+ op = digital.simple_framer(4)
+ dst = gr.vector_sink_b()
+ self.tb.connect(src, op)
+ self.tb.connect(op, dst)
+ self.tb.run()
+ result_data = dst.data()
+ self.assertEqual(expected_result, result_data)
if __name__ == '__main__':
gr_unittest.run(test_simple_framer, "test_simple_framer.xml")