summaryrefslogtreecommitdiff
path: root/gr-digital/lib/pfb_clock_sync_ccf_impl.cc
diff options
context:
space:
mode:
Diffstat (limited to 'gr-digital/lib/pfb_clock_sync_ccf_impl.cc')
-rw-r--r--gr-digital/lib/pfb_clock_sync_ccf_impl.cc68
1 files changed, 68 insertions, 0 deletions
diff --git a/gr-digital/lib/pfb_clock_sync_ccf_impl.cc b/gr-digital/lib/pfb_clock_sync_ccf_impl.cc
index 8749567fa2..815ef3cfdd 100644
--- a/gr-digital/lib/pfb_clock_sync_ccf_impl.cc
+++ b/gr-digital/lib/pfb_clock_sync_ccf_impl.cc
@@ -65,6 +65,8 @@ namespace gr {
d_max_dev(max_rate_deviation),
d_osps(osps), d_error(0), d_out_idx(0)
{
+ setup_rpc();
+
d_nfilters = filter_size;
d_sps = floor(sps);
@@ -193,6 +195,24 @@ namespace gr {
return d_rate_f;
}
+ float
+ pfb_clock_sync_ccf_impl::error() const
+ {
+ return d_error;
+ }
+
+ float
+ pfb_clock_sync_ccf_impl::rate() const
+ {
+ return d_rate_f;
+ }
+
+ float
+ pfb_clock_sync_ccf_impl::phase() const
+ {
+ return d_k;
+ }
+
/*******************************************************************
*******************************************************************/
@@ -435,5 +455,53 @@ namespace gr {
return i;
}
+ void
+ pfb_clock_sync_ccf_impl::setup_rpc()
+ {
+#ifdef ENABLE_GR_CTRLPORT
+ // Getters
+ add_rpc_variable(
+ rpcbasic_sptr(new rpcbasic_register_get<pfb_clock_sync_ccf_impl, float>(
+ d_name, "error", this, unique_id(),
+ &pfb_clock_sync_ccf_impl::error,
+ pmt::mp(-2.0f), pmt::mp(2.0f), pmt::mp(0.0f),
+ "", "Error signal of loop",
+ RPC_PRIVLVL_MIN, DISPTIMESERIESF)));
+
+ add_rpc_variable(
+ rpcbasic_sptr(new rpcbasic_register_get<pfb_clock_sync_ccf_impl, float>(
+ d_name, "rate", this, unique_id(),
+ &pfb_clock_sync_ccf_impl::rate,
+ pmt::mp(-2.0f), pmt::mp(2.0f), pmt::mp(0.0f),
+ "", "Rate change of phase",
+ RPC_PRIVLVL_MIN, DISPTIMESERIESF)));
+
+ add_rpc_variable(
+ rpcbasic_sptr(new rpcbasic_register_get<pfb_clock_sync_ccf_impl, float>(
+ d_name, "phase", this, unique_id(),
+ &pfb_clock_sync_ccf_impl::phase,
+ pmt::mp(0), pmt::mp((int)d_nfilters), pmt::mp(0),
+ "", "Current filter phase arm",
+ RPC_PRIVLVL_MIN, DISPTIMESERIESF)));
+
+ add_rpc_variable(
+ rpcbasic_sptr(new rpcbasic_register_get<pfb_clock_sync_ccf_impl, float>(
+ d_name, "loop bw", this, unique_id(),
+ &pfb_clock_sync_ccf_impl::loop_bandwidth,
+ pmt::mp(0.0f), pmt::mp(1.0f), pmt::mp(0.0f),
+ "", "Loop bandwidth",
+ RPC_PRIVLVL_MIN, DISPNULL)));
+
+ // Setters
+ add_rpc_variable(
+ rpcbasic_sptr(new rpcbasic_register_set<pfb_clock_sync_ccf_impl, float>(
+ d_name, "loop bw", this, unique_id(),
+ &pfb_clock_sync_ccf_impl::set_loop_bandwidth,
+ pmt::mp(0.0f), pmt::mp(1.0f), pmt::mp(0.0f),
+ "", "Loop bandwidth",
+ RPC_PRIVLVL_MIN, DISPNULL)));
+#endif /* ENABLE_GR_CTRLPORT */
+ }
+
} /* namespace digital */
} /* namespace gr */