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| author | Johnathan Corgan <jcorgan@corganenterprises.com> | 2010-02-28 12:47:43 -0800 |
|---|---|---|
| committer | Johnathan Corgan <jcorgan@corganenterprises.com> | 2010-02-28 12:47:43 -0800 |
| commit | a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 (patch) | |
| tree | 77121ca27b951f9bd687dbba33f6a9383ac74d5a /usrp2/fpga/control_lib/decoder_3_8.v | |
| parent | db29a2cfc18554ae0a3c55a4e13dc4cbfa86317f (diff) | |
Remove usrp1 and usrp2 FPGA files. These are now hosted at:
git://ettus.sourcerepo.com/ettus/fpga.git
...under the 'usrp1' and 'usrp2' top-level directories.
Diffstat (limited to 'usrp2/fpga/control_lib/decoder_3_8.v')
| -rw-r--r-- | usrp2/fpga/control_lib/decoder_3_8.v | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/usrp2/fpga/control_lib/decoder_3_8.v b/usrp2/fpga/control_lib/decoder_3_8.v deleted file mode 100644 index 729b45d18a..0000000000 --- a/usrp2/fpga/control_lib/decoder_3_8.v +++ /dev/null @@ -1,21 +0,0 @@ - -module decoder_3_8 - (input [2:0] sel, - output reg [7:0] res); - - always @(sel or res) - begin - case (sel) - 3'b000 : res = 8'b00000001; - 3'b001 : res = 8'b00000010; - 3'b010 : res = 8'b00000100; - 3'b011 : res = 8'b00001000; - 3'b100 : res = 8'b00010000; - 3'b101 : res = 8'b00100000; - 3'b110 : res = 8'b01000000; - default : res = 8'b10000000; - endcase // case(sel) - end // always @ (sel or res) - -endmodule // decoder_3_8 - |