diff options
| author | eb <eb@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-04-30 03:52:31 +0000 |
|---|---|---|
| committer | eb <eb@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-04-30 03:52:31 +0000 |
| commit | 9d1423b9506c89a51a10b6119d01ce9a82a13b0c (patch) | |
| tree | 186e1b20618bf805dd262572bd3b2778b767d201 /usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.qsf | |
| parent | 7f202514385708941073930bc6d9a5237bb89826 (diff) | |
Merged features/inband-usb -r6431:8293 into trunk.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@8295 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.qsf')
| -rw-r--r-- | usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.qsf | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.qsf b/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.qsf index c9eebc1ada..ae0807f6fc 100644 --- a/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.qsf +++ b/usrp/fpga/toplevel/usrp_inband_usb/usrp_inband_usb.qsf @@ -27,7 +27,7 @@ # ======================== set_global_assignment -name ORIGINAL_QUARTUS_VERSION 3.0 set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:14:04 JULY 13, 2003" -set_global_assignment -name LAST_QUARTUS_VERSION "5.1 SP1" +set_global_assignment -name LAST_QUARTUS_VERSION "7.2 SP2" # Pin & Location Assignments # ========================== @@ -392,7 +392,6 @@ set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/ram16_2sum.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_rom.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/halfband_decim.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/mac.v -set_global_assignment -name VERILOG_FILE ../../sdr_lib/hb/coeff_ram.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/tx_chain.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/rx_dcoffset.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/adc_interface.v @@ -419,4 +418,6 @@ set_global_assignment -name VERILOG_FILE ../../sdr_lib/serial_io.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/strobe_gen.v set_global_assignment -name VERILOG_FILE ../../sdr_lib/sign_extend.v set_global_assignment -name VERILOG_FILE ../../inband_lib/channel_ram.v -set_global_assignment -name VERILOG_FILE ../../inband_lib/register_io.v
\ No newline at end of file +set_global_assignment -name VERILOG_FILE ../../inband_lib/register_io.v +set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region" +set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
\ No newline at end of file |