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| author | Andy Walls <awalls.cx18@gmail.com> | 2019-01-21 19:18:39 -0500 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2019-02-17 11:12:54 -0800 |
| commit | f863efb1a9d3f535f0b51647cab22ce08379a6be (patch) | |
| tree | 79dc064c18bf89fd2a5afde0800b1dd976f0d54b /grc/core/blocks/_build.py | |
| parent | 3864d35f53a79bd201a1d1da4e7c30533793a6c9 (diff) | |
gr-digital: Prevent the clock tracking loop from generating negative estimates
Under extreme circumstances of the error signal input, the
clock tracking loop would allow the average clock period and
instantaneous clock period estimates to go negative, resulting in
an infinite loop when wrapping the clock phase.
Change clock period estimate limiting to happen when the estimates
are being formed, so that the negative, non-sensical values aren't
allowed to happen.
Diffstat (limited to 'grc/core/blocks/_build.py')
0 files changed, 0 insertions, 0 deletions