diff options
| author | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2009-01-05 18:05:17 +0000 |
|---|---|---|
| committer | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2009-01-05 18:05:17 +0000 |
| commit | 54625297142c1ed5ac4665d48ae6dea997b7b7eb (patch) | |
| tree | 0a5cf4125c20e4a4597b0d4748e375b5c8beba1b /gr-usrp | |
| parent | b54ab8fc36e242e0ae9c0fad99e1eda5d6423bd1 (diff) | |
Allow setting of non-standard FPGA master clock frequency for USRP1
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@10193 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'gr-usrp')
| -rw-r--r-- | gr-usrp/src/usrp_base.cc | 6 | ||||
| -rw-r--r-- | gr-usrp/src/usrp_base.h | 11 | ||||
| -rw-r--r-- | gr-usrp/src/usrp_base.i | 3 |
3 files changed, 18 insertions, 2 deletions
diff --git a/gr-usrp/src/usrp_base.cc b/gr-usrp/src/usrp_base.cc index 1709c7a44c..a4cf64ed73 100644 --- a/gr-usrp/src/usrp_base.cc +++ b/gr-usrp/src/usrp_base.cc @@ -83,6 +83,12 @@ usrp_base::fpga_master_clock_freq() const } void +usrp_base::set_fpga_master_clock_freq(long master_clock) +{ + d_usrp_basic->set_fpga_master_clock_freq(master_clock); +} + +void usrp_base::set_verbose (bool verbose) { d_usrp_basic->set_verbose (verbose); diff --git a/gr-usrp/src/usrp_base.h b/gr-usrp/src/usrp_base.h index 83aa699abf..c106739d01 100644 --- a/gr-usrp/src/usrp_base.h +++ b/gr-usrp/src/usrp_base.h @@ -98,7 +98,16 @@ public: /*! * \brief return frequency of master oscillator on USRP */ - long fpga_master_clock_freq() const; + long fpga_master_clock_freq() const; + + /*! + * Tell API that the master oscillator on the USRP is operating at a non-standard + * fixed frequency. This is only needed for custom USRP hardware modified to + * operate at a different frequency from the default factory configuration. This + * function must be called prior to any other API function. + * \param master_clock USRP2 FPGA master clock frequency in Hz (10..64 MHz) + */ + void set_fpga_master_clock_freq (long master_clock); void set_verbose (bool on); diff --git a/gr-usrp/src/usrp_base.i b/gr-usrp/src/usrp_base.i index 8f0c8368d4..d0ece1fb25 100644 --- a/gr-usrp/src/usrp_base.i +++ b/gr-usrp/src/usrp_base.i @@ -38,7 +38,8 @@ public: db_base_sptr db(int which_side, int which_dev); %rename (_real_selected_subdev) selected_subdev; db_base_sptr selected_subdev(usrp_subdev_spec ss); - long fpga_master_clock_freq() const; + long fpga_master_clock_freq() const; + void set_fpga_master_clock_freq(long master_clock); void set_verbose (bool on); static const int READ_FAILED = -99999; bool write_eeprom (int i2c_addr, int eeprom_offset, const std::string buf); |