diff options
| author | Tom Rondeau <tom@trondeau.com> | 2014-05-16 15:53:35 -0400 |
|---|---|---|
| committer | Tom Rondeau <tom@trondeau.com> | 2014-05-17 17:45:16 -0400 |
| commit | fbe59ce5a58477c6f60cff59b81c0cd3a8e2e024 (patch) | |
| tree | f86ec11a417dd3acf0027620ca0b821f3435f2f1 /gr-blocks/python | |
| parent | 86c7f2844331b6759461acf1afbe8e9c60a678a0 (diff) | |
blocks: adding an option to swap the order of the output bits of a repack_bits block.
Diffstat (limited to 'gr-blocks/python')
| -rwxr-xr-x | gr-blocks/python/blocks/qa_repack_bits_bb.py | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/gr-blocks/python/blocks/qa_repack_bits_bb.py b/gr-blocks/python/blocks/qa_repack_bits_bb.py index d9bbfe4fac..ad3f7728b1 100755 --- a/gr-blocks/python/blocks/qa_repack_bits_bb.py +++ b/gr-blocks/python/blocks/qa_repack_bits_bb.py @@ -121,6 +121,18 @@ class qa_repack_bits_bb (gr_unittest.TestCase): self.assertEqual(pmt.symbol_to_string(out_tag.key), tag_name) self.assertEqual(pmt.to_long(out_tag.value), len(expected_data)) + def test_006_msb0 (self): + """ 8 -> 3 """ + src_data = 200*(0b11110100, 0b11111111, 0b00111111) + expected_data = 200*((0b001,) + (0b011,) + (0b111,)*5 + (0b100,)) + k = 8 + l = 3 + src = blocks.vector_source_b(src_data, False, 1) + repack = blocks.repack_bits_bb(k, l, swap=True) + sink = blocks.vector_sink_b() + self.tb.connect(src, repack, sink) + self.tb.run () + self.assertEqual(sink.data(), expected_data) + if __name__ == '__main__': gr_unittest.run(qa_repack_bits_bb, "qa_repack_bits_bb.xml") - |