GNU Radio 3.7.2 C++ API
gcc_x86_cpuid.h
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1 /*
2  * Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
3  *
4  * This file is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 3, or (at your option) any
7  * later version.
8  *
9  * This file is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12  * General Public License for more details.
13  *
14  * Under Section 7 of GPL version 3, you are granted additional
15  * permissions described in the GCC Runtime Library Exception, version
16  * 3.1, as published by the Free Software Foundation.
17  *
18  * You should have received a copy of the GNU General Public License and
19  * a copy of the GCC Runtime Library Exception along with this program;
20  * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
21  * <http://www.gnu.org/licenses/>.
22  */
23 
24 /* %ecx */
25 #define bit_SSE3 (1 << 0)
26 #define bit_PCLMUL (1 << 1)
27 #define bit_SSSE3 (1 << 9)
28 #define bit_FMA (1 << 12)
29 #define bit_CMPXCHG16B (1 << 13)
30 #define bit_SSE4_1 (1 << 19)
31 #define bit_SSE4_2 (1 << 20)
32 #define bit_MOVBE (1 << 22)
33 #define bit_POPCNT (1 << 23)
34 #define bit_AES (1 << 25)
35 #define bit_XSAVE (1 << 26)
36 #define bit_OSXSAVE (1 << 27)
37 #define bit_AVX (1 << 28)
38 #define bit_F16C (1 << 29)
39 #define bit_RDRND (1 << 30)
40 
41 /* %edx */
42 #define bit_CMPXCHG8B (1 << 8)
43 #define bit_CMOV (1 << 15)
44 #define bit_MMX (1 << 23)
45 #define bit_FXSAVE (1 << 24)
46 #define bit_SSE (1 << 25)
47 #define bit_SSE2 (1 << 26)
48 
49 /* Extended Features */
50 /* %ecx */
51 #define bit_LAHF_LM (1 << 0)
52 #define bit_ABM (1 << 5)
53 #define bit_SSE4a (1 << 6)
54 #define bit_XOP (1 << 11)
55 #define bit_LWP (1 << 15)
56 #define bit_FMA4 (1 << 16)
57 #define bit_TBM (1 << 21)
58 
59 /* %edx */
60 #define bit_MMXEXT (1 << 22)
61 #define bit_LM (1 << 29)
62 #define bit_3DNOWP (1 << 30)
63 #define bit_3DNOW (1 << 31)
64 
65 /* Extended Features (%eax == 7) */
66 #define bit_FSGSBASE (1 << 0)
67 #define bit_BMI (1 << 3)
68 
69 #if defined(__i386__) && defined(__PIC__)
70 /* %ebx may be the PIC register. */
71 #if __GNUC__ >= 3
72 #define __cpuid(level, a, b, c, d) \
73  __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \
74  "cpuid\n\t" \
75  "xchg{l}\t{%%}ebx, %1\n\t" \
76  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
77  : "0" (level))
78 
79 #define __cpuid_count(level, count, a, b, c, d) \
80  __asm__ ("xchg{l}\t{%%}ebx, %1\n\t" \
81  "cpuid\n\t" \
82  "xchg{l}\t{%%}ebx, %1\n\t" \
83  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
84  : "0" (level), "2" (count))
85 #else
86 /* Host GCCs older than 3.0 weren't supporting Intel asm syntax
87  nor alternatives in i386 code. */
88 #define __cpuid(level, a, b, c, d) \
89  __asm__ ("xchgl\t%%ebx, %1\n\t" \
90  "cpuid\n\t" \
91  "xchgl\t%%ebx, %1\n\t" \
92  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
93  : "0" (level))
94 
95 #define __cpuid_count(level, count, a, b, c, d) \
96  __asm__ ("xchgl\t%%ebx, %1\n\t" \
97  "cpuid\n\t" \
98  "xchgl\t%%ebx, %1\n\t" \
99  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
100  : "0" (level), "2" (count))
101 #endif
102 #else
103 #define __cpuid(level, a, b, c, d) \
104  __asm__ ("cpuid\n\t" \
105  : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
106  : "0" (level))
107 
108 #define __cpuid_count(level, count, a, b, c, d) \
109  __asm__ ("cpuid\n\t" \
110  : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
111  : "0" (level), "2" (count))
112 #endif
113 
114 /* Return highest supported input value for cpuid instruction. ext can
115  be either 0x0 or 0x8000000 to return highest supported value for
116  basic or extended cpuid information. Function returns 0 if cpuid
117  is not supported or whatever cpuid returns in eax register. If sig
118  pointer is non-null, then first four bytes of the signature
119  (as found in ebx register) are returned in location pointed by sig. */
120 
121 static __inline unsigned int
122 __get_cpuid_max (unsigned int __ext, unsigned int *__sig)
123 {
124  unsigned int __eax, __ebx, __ecx, __edx;
125 
126 #ifndef __x86_64__
127  /* See if we can use cpuid. On AMD64 we always can. */
128 #if __GNUC__ >= 3
129  __asm__ ("pushf{l|d}\n\t"
130  "pushf{l|d}\n\t"
131  "pop{l}\t%0\n\t"
132  "mov{l}\t{%0, %1|%1, %0}\n\t"
133  "xor{l}\t{%2, %0|%0, %2}\n\t"
134  "push{l}\t%0\n\t"
135  "popf{l|d}\n\t"
136  "pushf{l|d}\n\t"
137  "pop{l}\t%0\n\t"
138  "popf{l|d}\n\t"
139  : "=&r" (__eax), "=&r" (__ebx)
140  : "i" (0x00200000));
141 #else
142 /* Host GCCs older than 3.0 weren't supporting Intel asm syntax
143  nor alternatives in i386 code. */
144  __asm__ ("pushfl\n\t"
145  "pushfl\n\t"
146  "popl\t%0\n\t"
147  "movl\t%0, %1\n\t"
148  "xorl\t%2, %0\n\t"
149  "pushl\t%0\n\t"
150  "popfl\n\t"
151  "pushfl\n\t"
152  "popl\t%0\n\t"
153  "popfl\n\t"
154  : "=&r" (__eax), "=&r" (__ebx)
155  : "i" (0x00200000));
156 #endif
157 
158  if (!((__eax ^ __ebx) & 0x00200000))
159  return 0;
160 #endif
161 
162  /* Host supports cpuid. Return highest supported cpuid input value. */
163  __cpuid (__ext, __eax, __ebx, __ecx, __edx);
164 
165  if (__sig)
166  *__sig = __ebx;
167 
168  return __eax;
169 }
170 
171 /* Return cpuid data for requested cpuid level, as found in returned
172  eax, ebx, ecx and edx registers. The function checks if cpuid is
173  supported and returns 1 for valid cpuid information or 0 for
174  unsupported cpuid level. All pointers are required to be non-null. */
175 
176 static __inline int
177 __get_cpuid (unsigned int __level,
178  unsigned int *__eax, unsigned int *__ebx,
179  unsigned int *__ecx, unsigned int *__edx)
180 {
181  unsigned int __ext = __level & 0x80000000;
182 
183  if (__get_cpuid_max (__ext, 0) < __level)
184  return 0;
185 
186  __cpuid (__level, *__eax, *__ebx, *__ecx, *__edx);
187  return 1;
188 }
static __inline unsigned int __get_cpuid_max(unsigned int __ext, unsigned int *__sig)
Definition: gcc_x86_cpuid.h:122
static __inline int __get_cpuid(unsigned int __level, unsigned int *__eax, unsigned int *__ebx, unsigned int *__ecx, unsigned int *__edx)
Definition: gcc_x86_cpuid.h:177
#define __cpuid(level, a, b, c, d)
Definition: gcc_x86_cpuid.h:103