GNU Radio 3.6.5 C++ API
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00001 /*************************************************************************** 00002 * This file is part of Qthid. 00003 * 00004 * Copyright (C) 2010 Howard Long, G6LVB 00005 * CopyRight (C) 2011 Alexandru Csete, OZ9AEC 00006 * Mario Lorenz, DL5MLO 00007 * 00008 * Qthid is free software: you can redistribute it and/or modify 00009 * it under the terms of the GNU General Public License as published by 00010 * the Free Software Foundation, either version 3 of the License, or 00011 * (at your option) any later version. 00012 * 00013 * Qthid is distributed in the hope that it will be useful, 00014 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00015 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00016 * GNU General Public License for more details. 00017 * 00018 * You should have received a copy of the GNU General Public License 00019 * along with Qthid. If not, see <http://www.gnu.org/licenses/>. 00020 * 00021 ***************************************************************************/ 00022 #ifndef FCDHIDCMD_H 00023 #define FCD_HID_CMD_H 1 00024 00025 00026 /* Commands applicable in bootloader mode */ 00027 #define FCD_CMD_BL_QUERY 1 /*!< Returns string with "FCDAPP version". */ 00028 #define FCD_CMD_BL_RESET 8 /*!< Reset to application mode. */ 00029 #define FCD_CMD_BL_ERASE 24 /*!< Erase firmware from FCD flash. */ 00030 #define FCD_CMD_BL_SET_BYTE_ADDR 25 /*!< TBD */ 00031 #define FCD_CMD_BL_GET_BYTE_ADDR_RANGE 26 /*!< Get address range. */ 00032 #define FCD_CMD_BL_WRITE_FLASH_BLOCK 27 /*!< Write flash block. */ 00033 #define FCD_CMD_BL_READ_FLASH_BLOCK 28 /*!< Read flash block. */ 00034 00035 /* Commands applicable in application mode */ 00036 #define FCD_CMD_APP_SET_FREQ_KHZ 100 /*!< Send with 3 byte unsigned little endian frequency in kHz. */ 00037 #define FCD_CMD_APP_SET_FREQ_HZ 101 /*!< Send with 4 byte unsigned little endian frequency in Hz, returns with actual frequency set in Hz */ 00038 #define FCD_CMD_APP_GET_FREQ_HZ 102 /*!< Returns 4 byte unsigned little endian frequency in Hz. */ 00039 00040 #define FCD_CMD_APP_GET_IF_RSSI 104 /*!< Supposed to return 1 byte unsigned IF RSSI (-35dBm=0, -10dBm=70) but it is not functional. */ 00041 #define FCD_CMD_APP_GET_PLL_LOCK 105 /*!< Returns 1 bit, true if locked. */ 00042 00043 #define FCD_CMD_APP_SET_DC_CORR 106 /*!< Send with 2 byte unsigned I DC correction followed by 2 byte unsigned Q DC correction. 32768 is the default centre value. */ 00044 #define FCD_CMD_APP_GET_DC_CORR 107 /*!< Returns 2 byte unsigned I DC correction followed by 2 byte unsigned Q DC correction. 32768 is the default centre value. */ 00045 #define FCD_CMD_APP_SET_IQ_CORR 108 /*!< Send with 2 byte signed phase correction followed by 2 byte unsigned gain correction. 0 is the default centre value for phase correction, 32768 is the default centre value for gain. */ 00046 #define FCD_CMD_APP_GET_IQ_CORR 109 /*!< Returns 2 byte signed phase correction followed by 2 byte unsigned gain correction. 0 is the default centre value for phase correction, 32768 is the default centre value for gain. */ 00047 00048 #define FCD_CMD_APP_SET_LNA_GAIN 110 /*!< Send a 1 byte value, see enums for reference. */ 00049 #define FCD_CMD_APP_SET_LNA_ENHANCE 111 00050 #define FCD_CMD_APP_SET_BAND 112 00051 #define FCD_CMD_APP_SET_RF_FILTER 113 00052 #define FCD_CMD_APP_SET_MIXER_GAIN 114 00053 #define FCD_CMD_APP_SET_BIAS_CURRENT 115 00054 #define FCD_CMD_APP_SET_MIXER_FILTER 116 00055 #define FCD_CMD_APP_SET_IF_GAIN1 117 00056 #define FCD_CMD_APP_SET_IF_GAIN_MODE 118 00057 #define FCD_CMD_APP_SET_IF_RC_FILTER 119 00058 #define FCD_CMD_APP_SET_IF_GAIN2 120 00059 #define FCD_CMD_APP_SET_IF_GAIN3 121 00060 #define FCD_CMD_APP_SET_IF_FILTER 122 00061 #define FCD_CMD_APP_SET_IF_GAIN4 123 00062 #define FCD_CMD_APP_SET_IF_GAIN5 124 00063 #define FCD_CMD_APP_SET_IF_GAIN6 125 00064 #define FCD_CMD_APP_SET_BIAS_TEE 126 /*!< Bias T for ext LNA. Send with one byte: 1=ON, 0=OFF. */ 00065 00066 #define FCD_CMD_APP_GET_LNA_GAIN 150 // Retrieve a 1 byte value, see enums for reference 00067 #define FCD_CMD_APP_GET_LNA_ENHANCE 151 00068 #define FCD_CMD_APP_GET_BAND 152 00069 #define FCD_CMD_APP_GET_RF_FILTER 153 00070 #define FCD_CMD_APP_GET_MIXER_GAIN 154 00071 #define FCD_CMD_APP_GET_BIAS_CURRENT 155 00072 #define FCD_CMD_APP_GET_MIXER_FILTER 156 00073 #define FCD_CMD_APP_GET_IF_GAIN1 157 00074 #define FCD_CMD_APP_GET_IF_GAIN_MODE 158 00075 #define FCD_CMD_APP_GET_IF_RC_FILTER 159 00076 #define FCD_CMD_APP_GET_IF_GAIN2 160 00077 #define FCD_CMD_APP_GET_IF_GAIN3 161 00078 #define FCD_CMD_APP_GET_IF_FILTER 162 00079 #define FCD_CMD_APP_GET_IF_GAIN4 163 00080 #define FCD_CMD_APP_GET_IF_GAIN5 164 00081 #define FCD_CMD_APP_GET_IF_GAIN6 165 00082 #define FCD_CMD_APP_GET_BIAS_TEE 166 /*!< Bias T. 1=ON, 0=OFF. */ 00083 00084 #define FCD_CMD_APP_SEND_I2C_BYTE 200 00085 #define FCD_CMD_APP_RECV_I2C_BYTE 201 00086 00087 #define FCD_CMD_APP_RESET 255 // Reset to bootloader 00088 00089 00090 typedef enum 00091 { 00092 TLGE_N5_0DB=0, 00093 TLGE_N2_5DB=1, 00094 TLGE_P0_0DB=4, 00095 TLGE_P2_5DB=5, 00096 TLGE_P5_0DB=6, 00097 TLGE_P7_5DB=7, 00098 TLGE_P10_0DB=8, 00099 TLGE_P12_5DB=9, 00100 TLGE_P15_0DB=10, 00101 TLGE_P17_5DB=11, 00102 TLGE_P20_0DB=12, 00103 TLGE_P25_0DB=13, 00104 TLGE_P30_0DB=14 00105 } TUNER_LNA_GAIN_ENUM; 00106 00107 typedef enum 00108 { 00109 TLEE_OFF=0, 00110 TLEE_0=1, 00111 TLEE_1=3, 00112 TLEE_2=5, 00113 TLEE_3=7 00114 } TUNER_LNA_ENHANCE_ENUM; 00115 00116 typedef enum 00117 { 00118 TBE_VHF2, 00119 TBE_VHF3, 00120 TBE_UHF, 00121 TBE_LBAND 00122 } TUNER_BAND_ENUM; 00123 00124 typedef enum 00125 { 00126 // Band 0, VHF II 00127 TRFE_LPF268MHZ=0, 00128 TRFE_LPF299MHZ=8, 00129 // Band 1, VHF III 00130 TRFE_LPF509MHZ=0, 00131 TRFE_LPF656MHZ=8, 00132 // Band 2, UHF 00133 TRFE_BPF360MHZ=0, 00134 TRFE_BPF380MHZ=1, 00135 TRFE_BPF405MHZ=2, 00136 TRFE_BPF425MHZ=3, 00137 TRFE_BPF450MHZ=4, 00138 TRFE_BPF475MHZ=5, 00139 TRFE_BPF505MHZ=6, 00140 TRFE_BPF540MHZ=7, 00141 TRFE_BPF575MHZ=8, 00142 TRFE_BPF615MHZ=9, 00143 TRFE_BPF670MHZ=10, 00144 TRFE_BPF720MHZ=11, 00145 TRFE_BPF760MHZ=12, 00146 TRFE_BPF840MHZ=13, 00147 TRFE_BPF890MHZ=14, 00148 TRFE_BPF970MHZ=15, 00149 // Band 2, L band 00150 TRFE_BPF1300MHZ=0, 00151 TRFE_BPF1320MHZ=1, 00152 TRFE_BPF1360MHZ=2, 00153 TRFE_BPF1410MHZ=3, 00154 TRFE_BPF1445MHZ=4, 00155 TRFE_BPF1460MHZ=5, 00156 TRFE_BPF1490MHZ=6, 00157 TRFE_BPF1530MHZ=7, 00158 TRFE_BPF1560MHZ=8, 00159 TRFE_BPF1590MHZ=9, 00160 TRFE_BPF1640MHZ=10, 00161 TRFE_BPF1660MHZ=11, 00162 TRFE_BPF1680MHZ=12, 00163 TRFE_BPF1700MHZ=13, 00164 TRFE_BPF1720MHZ=14, 00165 TRFE_BPF1750MHZ=15 00166 } TUNER_RF_FILTER_ENUM; 00167 00168 typedef enum 00169 { 00170 TMGE_P4_0DB=0, 00171 TMGE_P12_0DB=1 00172 } TUNER_MIXER_GAIN_ENUM; 00173 00174 typedef enum 00175 { 00176 TBCE_LBAND=0, 00177 TBCE_1=1, 00178 TBCE_2=2, 00179 TBCE_VUBAND=3 00180 } TUNER_BIAS_CURRENT_ENUM; 00181 00182 typedef enum 00183 { 00184 TMFE_27_0MHZ=0, 00185 TMFE_4_6MHZ=8, 00186 TMFE_4_2MHZ=9, 00187 TMFE_3_8MHZ=10, 00188 TMFE_3_4MHZ=11, 00189 TMFE_3_0MHZ=12, 00190 TMFE_2_7MHZ=13, 00191 TMFE_2_3MHZ=14, 00192 TMFE_1_9MHZ=15 00193 } TUNER_MIXER_FILTER_ENUM; 00194 00195 typedef enum 00196 { 00197 TIG1E_N3_0DB=0, 00198 TIG1E_P6_0DB=1 00199 } TUNER_IF_GAIN1_ENUM; 00200 00201 typedef enum 00202 { 00203 TIGME_LINEARITY=0, 00204 TIGME_SENSITIVITY=1 00205 } TUNER_IF_GAIN_MODE_ENUM; 00206 00207 typedef enum 00208 { 00209 TIRFE_21_4MHZ=0, 00210 TIRFE_21_0MHZ=1, 00211 TIRFE_17_6MHZ=2, 00212 TIRFE_14_7MHZ=3, 00213 TIRFE_12_4MHZ=4, 00214 TIRFE_10_6MHZ=5, 00215 TIRFE_9_0MHZ=6, 00216 TIRFE_7_7MHZ=7, 00217 TIRFE_6_4MHZ=8, 00218 TIRFE_5_3MHZ=9, 00219 TIRFE_4_4MHZ=10, 00220 TIRFE_3_4MHZ=11, 00221 TIRFE_2_6MHZ=12, 00222 TIRFE_1_8MHZ=13, 00223 TIRFE_1_2MHZ=14, 00224 TIRFE_1_0MHZ=15 00225 } TUNER_IF_RC_FILTER_ENUM; 00226 00227 typedef enum 00228 { 00229 TIG2E_P0_0DB=0, 00230 TIG2E_P3_0DB=1, 00231 TIG2E_P6_0DB=2, 00232 TIG2E_P9_0DB=3 00233 } TUNER_IF_GAIN2_ENUM; 00234 00235 typedef enum 00236 { 00237 TIG3E_P0_0DB=0, 00238 TIG3E_P3_0DB=1, 00239 TIG3E_P6_0DB=2, 00240 TIG3E_P9_0DB=3 00241 } TUNER_IF_GAIN3_ENUM; 00242 00243 typedef enum 00244 { 00245 TIG4E_P0_0DB=0, 00246 TIG4E_P1_0DB=1, 00247 TIG4E_P2_0DB=2 00248 } TUNER_IF_GAIN4_ENUM; 00249 00250 typedef enum 00251 { 00252 TIFE_5_50MHZ=0, 00253 TIFE_5_30MHZ=1, 00254 TIFE_5_00MHZ=2, 00255 TIFE_4_80MHZ=3, 00256 TIFE_4_60MHZ=4, 00257 TIFE_4_40MHZ=5, 00258 TIFE_4_30MHZ=6, 00259 TIFE_4_10MHZ=7, 00260 TIFE_3_90MHZ=8, 00261 TIFE_3_80MHZ=9, 00262 TIFE_3_70MHZ=10, 00263 TIFE_3_60MHZ=11, 00264 TIFE_3_40MHZ=12, 00265 TIFE_3_30MHZ=13, 00266 TIFE_3_20MHZ=14, 00267 TIFE_3_10MHZ=15, 00268 TIFE_3_00MHZ=16, 00269 TIFE_2_95MHZ=17, 00270 TIFE_2_90MHZ=18, 00271 TIFE_2_80MHZ=19, 00272 TIFE_2_75MHZ=20, 00273 TIFE_2_70MHZ=21, 00274 TIFE_2_60MHZ=22, 00275 TIFE_2_55MHZ=23, 00276 TIFE_2_50MHZ=24, 00277 TIFE_2_45MHZ=25, 00278 TIFE_2_40MHZ=26, 00279 TIFE_2_30MHZ=27, 00280 TIFE_2_28MHZ=28, 00281 TIFE_2_24MHZ=29, 00282 TIFE_2_20MHZ=30, 00283 TIFE_2_15MHZ=31 00284 } TUNER_IF_FILTER_ENUM; 00285 00286 typedef enum 00287 { 00288 TIG5E_P3_0DB=0, 00289 TIG5E_P6_0DB=1, 00290 TIG5E_P9_0DB=2, 00291 TIG5E_P12_0DB=3, 00292 TIG5E_P15_0DB=4 00293 } TUNER_IF_GAIN5_ENUM; 00294 00295 typedef enum 00296 { 00297 TIG6E_P3_0DB=0, 00298 TIG6E_P6_0DB=1, 00299 TIG6E_P9_0DB=2, 00300 TIG6E_P12_0DB=3, 00301 TIG6E_P15_0DB=4 00302 } TUNER_IF_GAIN6_ENUM; 00303 00304 00305 #endif // FCDHIDCMD_H