GNU Radio 3.3.0 C++ API
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00001 /* -*- c++ -*- */ 00002 /* 00003 * Copyright 2003 Free Software Foundation, Inc. 00004 * 00005 * This file is part of GNU Radio 00006 * 00007 * GNU Radio is free software; you can redistribute it and/or modify 00008 * it under the terms of the GNU General Public License as published by 00009 * the Free Software Foundation; either version 3, or (at your option) 00010 * any later version. 00011 * 00012 * GNU Radio is distributed in the hope that it will be useful, 00013 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00014 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00015 * GNU General Public License for more details. 00016 * 00017 * You should have received a copy of the GNU General Public License 00018 * along with GNU Radio; see the file COPYING. If not, write to 00019 * the Free Software Foundation, Inc., 51 Franklin Street, 00020 * Boston, MA 02110-1301, USA. 00021 */ 00022 #ifndef _SYNCDELAY_H_ 00023 #define _SYNCDELAY_H_ 00024 00025 /* 00026 * Magic delay required between access to certain xdata registers (TRM page 15-106). 00027 * For our configuration, 48 MHz FX2 / 48 MHz IFCLK, we need three cycles. Each 00028 * NOP is a single cycle.... 00029 * 00030 * From TRM page 15-105: 00031 * 00032 * Under certain conditions, some read and write access to the FX2 registers must 00033 * be separated by a "synchronization delay". The delay is necessary only under the 00034 * following conditions: 00035 * 00036 * - between a write to any register in the 0xE600 - 0xE6FF range and a write to one 00037 * of the registers listed below. 00038 * 00039 * - between a write to one of the registers listed below and a read from any register 00040 * in the 0xE600 - 0xE6FF range. 00041 * 00042 * Registers which require a synchronization delay: 00043 * 00044 * FIFORESET FIFOPINPOLAR 00045 * INPKTEND EPxBCH:L 00046 * EPxFIFOPFH:L EPxAUTOINLENH:L 00047 * EPxFIFOCFG EPxGPIFFLGSEL 00048 * PINFLAGSAB PINFLAGSCD 00049 * EPxFIFOIE EPxFIFOIRQ 00050 * GPIFIE GPIFIRQ 00051 * UDMACRCH:L GPIFADRH:L 00052 * GPIFTRIG EPxGPIFTRIG 00053 * OUTPKTEND REVCTL 00054 * GPIFTCB3 GPIFTCB2 00055 * GPIFTCB1 GPIFTCB0 00056 */ 00057 00058 /* 00059 * FIXME ensure that the peep hole optimizer isn't screwing us 00060 */ 00061 #define SYNCDELAY _asm nop; nop; nop; _endasm 00062 #define NOP _asm nop; _endasm 00063 00064 00065 #endif /* _SYNCDELAY_H_ */