GNU Radio 3.3.0 C++ API
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00001 /* -*- c++ -*- */ 00002 /* 00003 * Copyright 2008,2010 Free Software Foundation, Inc. 00004 * 00005 * This file is part of GNU Radio 00006 * 00007 * GNU Radio is free software; you can redistribute it and/or modify 00008 * it under the terms of the GNU General Public License as published by 00009 * the Free Software Foundation; either version 3, or (at your option) 00010 * any later version. 00011 * 00012 * GNU Radio is distributed in the hope that it will be useful, 00013 * but WITHOUT ANY WARRANTY; without even the implied warranty of 00014 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 00015 * GNU General Public License for more details. 00016 * 00017 * You should have received a copy of the GNU General Public License 00018 * along with GNU Radio; see the file COPYING. If not, write to 00019 * the Free Software Foundation, Inc., 51 Franklin Street, 00020 * Boston, MA 02110-1301, USA. 00021 */ 00022 00023 #ifndef INCLUDED_GRI_LFSR_H 00024 #define INCLUDED_GRI_LFSR_H 00025 00026 #include <stdexcept> 00027 #include <stdint.h> 00028 00029 /*! 00030 * \brief Fibonacci Linear Feedback Shift Register using specified polynomial mask 00031 * \ingroup misc 00032 * 00033 * Generates a maximal length pseudo-random sequence of length 2^degree-1 00034 * 00035 * Constructor: gri_lfsr(int mask, int seed, int reg_len); 00036 * 00037 * mask - polynomial coefficients representing the locations 00038 * of feedback taps from a shift register which are xor'ed 00039 * together to form the new high order bit. 00040 * 00041 * Some common masks might be: 00042 * x^4 + x^3 + x^0 = 0x19 00043 * x^5 + x^3 + x^0 = 0x29 00044 * x^6 + x^5 + x^0 = 0x61 00045 * 00046 * seed - the initialization vector placed into the register 00047 * durring initialization. Low order bit corresponds 00048 * to x^0 coefficient -- the first to be shifted as output. 00049 * 00050 * reg_len - specifies the length of the feedback shift register 00051 * to be used. Durring each iteration, the register 00052 * is rightshifted one and the new bit is placed in bit reg_len. 00053 * reg_len should generally be at least order(mask) + 1 00054 * 00055 * 00056 * see http://en.wikipedia.org/wiki/Linear_feedback_shift_register 00057 * for more explanation. 00058 * 00059 * 00060 * 00061 * next_bit() - Standard LFSR operation 00062 * 00063 * Perform one cycle of the LFSR. The output bit is taken from 00064 * the shift register LSB. The shift register MSB is assigned from 00065 * the modulo 2 sum of the masked shift register. 00066 * 00067 * next_bit_scramble(unsigned char input) - Scramble an input stream 00068 * 00069 * Perform one cycle of the LFSR. The output bit is taken from 00070 * the shift register LSB. The shift register MSB is assigned from 00071 * the modulo 2 sum of the masked shift register and the input LSB. 00072 * 00073 * next_bit_descramble(unsigned char input) - Descramble an input stream 00074 * 00075 * Perform one cycle of the LFSR. The output bit is taken from 00076 * the modulo 2 sum of the masked shift register and the input LSB. 00077 * The shift register MSB is assigned from the LSB of the input. 00078 * 00079 * See http://en.wikipedia.org/wiki/Scrambler for operation of these 00080 * last two functions (see multiplicative scrambler.) 00081 * 00082 */ 00083 00084 class gri_lfsr 00085 { 00086 private: 00087 uint32_t d_shift_register; 00088 uint32_t d_mask; 00089 uint32_t d_seed; 00090 uint32_t d_shift_register_length; // less than 32 00091 00092 static uint32_t 00093 popCount(uint32_t x) 00094 { 00095 uint32_t r = x - ((x >> 1) & 033333333333) 00096 - ((x >> 2) & 011111111111); 00097 return ((r + (r >> 3)) & 030707070707) % 63; 00098 } 00099 00100 public: 00101 00102 gri_lfsr(uint32_t mask, uint32_t seed, uint32_t reg_len) 00103 : d_shift_register(seed), 00104 d_mask(mask), 00105 d_seed(seed), 00106 d_shift_register_length(reg_len) 00107 { 00108 if (reg_len > 31) 00109 throw std::invalid_argument("reg_len must be <= 31"); 00110 } 00111 00112 unsigned char next_bit() { 00113 unsigned char output = d_shift_register & 1; 00114 unsigned char newbit = popCount( d_shift_register & d_mask )%2; 00115 d_shift_register = ((d_shift_register>>1) | (newbit<<d_shift_register_length)); 00116 return output; 00117 } 00118 00119 unsigned char next_bit_scramble(unsigned char input) { 00120 unsigned char output = d_shift_register & 1; 00121 unsigned char newbit = (popCount( d_shift_register & d_mask )%2)^(input & 1); 00122 d_shift_register = ((d_shift_register>>1) | (newbit<<d_shift_register_length)); 00123 return output; 00124 } 00125 00126 unsigned char next_bit_descramble(unsigned char input) { 00127 unsigned char output = (popCount( d_shift_register & d_mask )%2)^(input & 1); 00128 unsigned char newbit = input & 1; 00129 d_shift_register = ((d_shift_register>>1) | (newbit<<d_shift_register_length)); 00130 return output; 00131 } 00132 00133 /*! 00134 * Reset shift register to initial seed value 00135 */ 00136 void reset() { d_shift_register = d_seed; } 00137 00138 /*! 00139 * Rotate the register through x number of bits 00140 * where we are just throwing away the results to get queued up correctly 00141 */ 00142 void pre_shift(int num){ 00143 for(int i=0; i<num; i++){ 00144 next_bit(); 00145 } 00146 } 00147 00148 int mask() const { return d_mask; } 00149 }; 00150 00151 #endif /* INCLUDED_GRI_LFSR_H */