From 7dd8552fb38a5bfdf68c280261fad60d43bdc328 Mon Sep 17 00:00:00 2001
From: jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5>
Date: Sun, 26 Oct 2008 19:46:59 +0000
Subject: Updated usrp2_rx_cfile.py and usrp2_siggen.py to use updated gr-usrp2
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9858 221aa14e-8319-0410-a670-987f0aec2ac5
---
gr-utils/src/python/usrp2_rx_cfile.py | 17 ++++++++---------
gr-utils/src/python/usrp2_siggen.py | 8 +++-----
2 files changed, 11 insertions(+), 14 deletions(-)
(limited to 'gr-utils/src')
diff --git a/gr-utils/src/python/usrp2_rx_cfile.py b/gr-utils/src/python/usrp2_rx_cfile.py
index 539b3e3d3f..f8f1de69b5 100755
--- a/gr-utils/src/python/usrp2_rx_cfile.py
+++ b/gr-utils/src/python/usrp2_rx_cfile.py
@@ -22,8 +22,8 @@
"""
Read samples from the USRP2 and write to file formatted as binary
-outputs single precision complex float values or complex short values (interleaved 16 bit signed short integers).
-
+outputs single precision complex float values or complex short values
+(interleaved 16 bit signed short integers).
"""
from gnuradio import gr, eng_notation
@@ -52,9 +52,9 @@ class rx_cfile_block(gr.top_block):
# Set receive daughterboard gain
if options.gain is None:
- #g = self._u.gain_range()
- #options.gain = float(g[0]+g[1])/2
- options.gain = 0 # Until gain range is implemented
+ g = self._u.gain_range()
+ options.gain = float(g[0]+g[1])/2
+ print "Using mid-point gain of", options.gain, "(", g[0], "-", g[1], ")"
self._u.set_gain(options.gain)
# Set receive frequency
@@ -63,7 +63,7 @@ class rx_cfile_block(gr.top_block):
sys.stderr.write('Failed to set center frequency\n')
raise SystemExit, 1
- # Create head block if needed wire it up
+ # Create head block if needed and wire it up
if options.nsamples is None:
self.connect(self._u, self._sink)
else:
@@ -74,13 +74,12 @@ class rx_cfile_block(gr.top_block):
self.connect(self._u, self._head, self._sink)
- #input_rate = self.u.adc_freq() / self.u.decim_rate()
- input_rate = 100e6/options.decim
+ input_rate = self._u.adc_rate()/self._u.decim()
if options.verbose:
print "Network interface:", options.interface
print "USRP2 address:", self._u.mac_addr()
- #print "Using RX d'board %s" % (self._u.rx_name(),)
+ print "Using RX d'board id 0x%04X" % (self._u.daughterboard_id(),)
print "Rx gain:", options.gain
print "Rx baseband frequency:", n2s(tr.baseband_freq)
print "Rx DDC frequency:", n2s(tr.dxc_freq)
diff --git a/gr-utils/src/python/usrp2_siggen.py b/gr-utils/src/python/usrp2_siggen.py
index 26b7916abd..40506213e3 100755
--- a/gr-utils/src/python/usrp2_siggen.py
+++ b/gr-utils/src/python/usrp2_siggen.py
@@ -38,9 +38,8 @@ class siggen_top_block(gr.top_block):
# Set the Tx daughterboard gain as requested
if options.gain is None:
- #g = self._u.gain_range()
- #options.gain = float(g[0]+g[1])/2
- options.gain = 0 # Until gain range is implemented
+ g = self._u.gain_range()
+ options.gain = float(g[0]+g[1])/2
self._u.set_gain(options.gain)
# Tune the USRP2 FPGA and daughterboard to the requested center frequency
@@ -49,8 +48,7 @@ class siggen_top_block(gr.top_block):
sys.stderr.write('Failed to set center frequency\n')
raise SystemExit, 1
- #eth_rate = self._u.dac_rate()/self._u.interp_rate()
- eth_rate = 100e6/options.interp # FIXME
+ eth_rate = self._u.dac_rate()/self._u.interp()
# Create a source for the requested waveform type
if options.type == gr.GR_SIN_WAVE or options.type == gr.GR_CONST_WAVE:
--
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