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* Properly reset the fifos. We didn't connect before.Matt Ettus2009-10-051-5/+5
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* Merge branch 'new_eth' of http://gnuradio.org/git/matt into masterJohnathan Corgan2009-10-01630-90133/+2607
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'new_eth' of http://gnuradio.org/git/matt: (42 commits) Fix warnings, mostly from implicitly defined wires or unspecified widths fullchip sim now compiles again, after moving eth and models over to new simple_gemac remove unused opencores remove debugging code no idea where this came from, it shouldn't be here Copied wb_1master back from quad radio Remove old mac. Good riddance. remove unused port More xilinx fifos, more clean up of our fifos might as well use a cascade fifo to help timing and give a little more capacity fix a typo which caused tx glitches Untested fixes for getting serdes onto the new fifo system. Compiles, at least Implement Eth flow control using pause frames parameterized fifo sizes, some reformatting remove unused old style fifo allow control of whether or not to honor flow control, adds some debug lines debug the rx side no longer used, replaced by newfifo version remove special last_line adjustment from ethernet port Firmware now inserts mac source address value in each frame. ...
| * Fix warnings, mostly from implicitly defined wires or unspecified widthsMatt Ettus2009-10-016-8/+14
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| * fullchip sim now compiles again, after moving eth and models over to new ↵Matt Ettus2009-10-015-17/+159
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| * remove unused opencoresMatt Ettus2009-10-01463-71885/+0
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| * remove debugging codeMatt Ettus2009-09-302-4/+0
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| * Merge branch 'new_wb_intercon' into new_ethMatt Ettus2009-09-302-224/+239
| |\ | | | | | | | | | | | | | | | | | | Functionality should not change at all Conflicts: usrp2/fpga/top/u2_core/u2_core.v
| | * Copied wb_1master back from quad radioMatt Ettus2009-09-302-223/+238
| | | | | | | | | | | | more sane config options, should be exactly the same memory map
| * | no idea where this came from, it shouldn't be hereMatt Ettus2009-09-301-1/+1
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| * | Merge commit 'origin' into new_ethMatt Ettus2009-09-245-14/+31
| |\| | | | | | | | | | | | | Conflicts: .gitignore
| * | Merge branch 'serdes_newfifo' into new_ethMatt Ettus2009-09-203-79/+30
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| | * | Untested fixes for getting serdes onto the new fifo system. Compiles, at leastMatt Ettus2009-09-043-79/+30
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| * | | Remove old mac. Good riddance.Matt Ettus2009-09-1064-15211/+0
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| * | | remove unused portMatt Ettus2009-09-101-1/+1
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| * | | More xilinx fifos, more clean up of our fifosMatt Ettus2009-09-1012-129/+555
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| * | | might as well use a cascade fifo to help timing and give a little more capacityMatt Ettus2009-09-101-1/+1
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| * | | fix a typo which caused tx glitchesMatt Ettus2009-09-051-1/+1
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| * | Implement Eth flow control using pause framesMatt Ettus2009-09-047-74/+73
| | | | | | | | | | | | | | | | | | Not fully tested, but it seems to work without frame errors, sequence number errors or ethernet overruns. Still of course will get tx underruns on a slow machine, and the transmitted signal has some issues though.
| * | parameterized fifo sizes, some reformattingMatt Ettus2009-09-042-54/+57
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| * | remove unused old style fifoMatt Ettus2009-09-041-31/+0
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| * | allow control of whether or not to honor flow control, adds some debug linesMatt Ettus2009-09-041-6/+16
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| * | debug the rx sideMatt Ettus2009-09-041-1/+6
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| * | no longer used, replaced by newfifo versionMatt Ettus2009-09-041-66/+0
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| * | Merge branch 'new_eth' of http://gnuradio.org/git/eb into new_ethMatt Ettus2009-09-042-2/+3
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| | * | remove special last_line adjustment from ethernet portEric Blossom2009-09-042-2/+3
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| * | | Merge branch 'new_eth' of http://gnuradio.org/git/eb into new_ethMatt Ettus2009-09-0412-7/+13
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| | * | Firmware now inserts mac source address value in each frame.Eric Blossom2009-09-0412-5/+13
| | | | | | | | | | | | | | | | The old mac used to do this automatically.
| | * | Merge branch 'new_eth' of http://gnuradio.org/git/matt into new_ethEric Blossom2009-09-043-29/+36
| | |\ \ | | | | | | | | | | | | | | | | | | | | * 'new_eth' of http://gnuradio.org/git/matt: seems to build a decent fpga, but still some issues with a full connection.
| | * | | stop sending short ethernet command packets.Eric Blossom2009-09-041-1/+12
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| | * | | Fix problem with commands timing out (specifically stop_rx_streaming)Eric Blossom2009-09-042-2/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After fixing the race, this change uses Tom's idea to stop enqueuing data when trying to stop, and adds a new flush_rx_samples method to drop any samples that may have already been accumulated. I ran Tom's test case 500 times with 0 failures ;-)
| | * | | Fix race condition that caused commands such as stop_rx_streaming to fail.Eric Blossom2009-09-044-46/+62
| | | | | | | | | | | | | | | | | | | | | | | | | This fixes the bulk of the problem. Next step is to drop data packets while waiting for the reply.
| | * | | removed hard-coded link_is_up = true;Eric Blossom2009-09-031-2/+0
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| * | | | properly set the address filterMatt Ettus2009-09-042-34/+21
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| * | | | Merge branch 'master' into new_ethMatt Ettus2009-09-045-59/+129
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| * | | | seems to build a decent fpga, but still some issues with a full connection.Matt Ettus2009-09-033-29/+36
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| * | | MAC transmit seems to work now. The root cause of the problem was ↵Matt Ettus2009-09-034-67/+70
| | | | | | | | | | | | | | | | accidentally using the rx_clk in one stage of the fifos on the tx side.
| * | | set device to xc3s2000. Shouldn't make any differences.Matt Ettus2009-09-031-2/+2
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| * | | misc ignoresMatt Ettus2009-09-032-0/+3
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| * | | made a new block ram based fifo, 64 (65) elements long, all fifos now have ↵Matt Ettus2009-09-0328-155/+652
| | | | | | | | | | | | | | | | "enhanced level logic" for accurate fullness. Maybe this will help...
| * | | bring the testbench files up to dateMatt Ettus2009-09-024-88/+79
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| * | | major cleanup of 2 clock fifosMatt Ettus2009-09-024-29/+48
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| * | | cleaning up the new fifosMatt Ettus2009-09-023-155/+0
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| * | | cascadefifo.v wasn't used, only the double cascade version. fifo_2clock.v ↵Matt Ettus2009-09-024-56/+2
| | | | | | | | | | | | | | | | and fifo_2clock.v are empty
| * | | never used, not neededMatt Ettus2009-09-024-441/+0
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| * | | ignore .o filesMatt Ettus2009-09-022-0/+3
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| * | | debug pins, cleaned ignoresMatt Ettus2009-09-023-9/+22
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| * | | sort out active-low lines on locallink fifos, added debug pinsMatt Ettus2009-09-021-3/+15
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| * | | Removed these files completely, they were for the old style of fifosMatt Ettus2009-09-024-497/+0
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| * | | fixed addressing of registers, and added write enables to those that were ↵Matt Ettus2009-09-011-6/+9
| | | | | | | | | | | | | | | | missing. MDIO seems ok.
| * | | tell s/w link is up. additional debugging outputEric Blossom2009-09-013-5/+18
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