Cypress EZ-USB FX2 USB Microcontroller
Official documentation: http://www-corot.obspm.fr/COROT-ETC/Files/CY7C68013.pdf
Details of the FX2 microcontroller...
The following loops were examined from usrp_main.c.
main( )
- Initialize USRP
- Initialize GPIF
- Patch USB Descriptors (read from EEPROM, set HW device ID)
- Setup Autovectors
- Install USB Handlers
- Re-enumerate
- Run main_loop( )
main_loop( )
- Check for USB setup packets
- Check and log RX Overruns/TX Underruns
- Check for packets to send back to host
- Check for packets to send to FPGA
USB Endpoints
Different USB endpoints are used to logically separate different operations occuring on the bus into separate flows. There are currently 3 USB endpoints checked/used within the main_loop( ) as described earlier.
| Endpoint | Description |
| 0 | Control/status |
| 2 | Host -> FPGA |
| 6 | FPGA -> Host |
USB Transfers
Describe typical USB transfers. Always 512-byte bulk transfers. Link to in-band signaling information.
All control information is written using endpoint 0 and the vendor commands. These commands are separated into two different categories: VRT_VENDOR_IN and VRT_VENDOR_OUT. These are processed in the app_vendor_cmd( ) function seen in usrp_main.c.
All control communication between the FPGA and FX2 microcontroller is done over the SPI. Daughterboards all seem to be controlled by the generic VRQ_I2C_* and VRQ_SPI_* commands.
VRT_VENDOR_IN Commands
- VRQ_GET_STATUS
- GS_TX_UNDERRUN
- GS_RX_OVERRUN
- VRQ_I2C_READ
- VRQ_SPI_READ
VRT_VENDOR_OUT Commands
- VRQ_SET_LED
- VRQ_FPGA_LOAD
- FL_BEGIN
- FL_XFER
- FL_END
- VRQ_FPGA_SET_RESET
- VRQ_FPGA_SET_TX_ENABLE
- VRQ_FPGA_SET_RX_ENABLE
- VRQ_FPGA_SET_TX_RESET
- VRQ_FPGA_SET_RX_RESET
- VRQ_I2C_WRITE
- VRQ_SPI_WRITE
