Ticket #212 (defect)
Opened 9 months ago
Pause frames are put into the rx fifo, filling it up
Status: new
| Reported by: | matt | Assigned to: | matt |
|---|---|---|---|
| Priority: | normal | Milestone: | |
| Component: | usrp2 | Version: | |
| Keywords: | ethernet mac | Cc: | |
In the ethernet core, Pause frames are put into the rx fifo. Eventually it fills up if you are paused for long enough.
Need to fix this in the MAC_rx_ctrl and possibly MAC_rx_FF blocks. May need to redo the FIFO or the pre-FIFO in order to do this.
