Changeset 9780
- Timestamp:
- 10/11/08 18:26:16
- Files:
-
- gnuradio/trunk/usrp2/firmware/apps/txrx.c (modified) (1 diff)
- gnuradio/trunk/usrp2/firmware/lib/clocks.c (modified) (2 diffs)
- gnuradio/trunk/usrp2/firmware/lib/clocks.h (modified) (1 diff)
- gnuradio/trunk/usrp2/firmware/lib/u2_init.c (modified) (1 diff)
Legend:
- Unmodified
- Added
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gnuradio/trunk/usrp2/firmware/apps/txrx.c
r9528 r9780 36 36 #include <stdlib.h> 37 37 #include <string.h> 38 38 #include "clocks.h" 39 39 40 40 #define FW_SETS_SEQNO 1 // define to 0 or 1 (FIXME must be 1 for now) gnuradio/trunk/usrp2/firmware/lib/clocks.c
r9778 r9780 53 53 // Set up other clocks 54 54 55 clocks_enable_test_clk(false );55 clocks_enable_test_clk(false, 0); 56 56 clocks_enable_tx_dboard(false, 0); 57 57 clocks_enable_rx_dboard(false, 0); … … 129 129 } 130 130 131 void 132 clocks_ enable_test_clk(bool enable)131 int inline 132 clocks_gen_div(int divisor) 133 133 { 134 if (enable){ 135 ad9510_write_reg(0x3C, 0x08); // Turn on output 0 -- Test output 136 ad9510_write_reg(0x49, 0x80); // Bypass divider 0 134 int L,H; 135 L = (divisor>>1)-1; 136 H = divisor-L-2; 137 return (L<<4)|H; 138 } 139 140 #define CLOCK_OUT_EN 0x08 141 #define CLOCK_OUT_DIS_CMOS 0x01 142 #define CLOCK_OUT_DIS_PECL 0x02 143 #define CLOCK_DIV_DIS 0x80 144 #define CLOCK_DIV_EN 0x00 145 146 void 147 clocks_enable_XXX_clk(bool enable, int divisor, int reg_en, int reg_div, int val_off) 148 { 149 if(enable) { 150 ad9510_write_reg(reg_en,CLOCK_OUT_EN); // Turn on output, normal levels 151 if(divisor>1) { 152 ad9510_write_reg(reg_div,clocks_gen_div(divisor)); // Set divisor 153 ad9510_write_reg(reg_div+1,CLOCK_DIV_EN); // Enable divider 154 } 155 else { 156 ad9510_write_reg(reg_div+1,CLOCK_DIV_DIS); // Disable Divider 157 } 137 158 } 138 159 else { 139 ad9510_write_reg(0x3C, 0x02); // Turn off output 0 160 ad9510_write_reg(reg_en,val_off); // Power off output (val different for PECL/CMOS) 161 ad9510_write_reg(reg_div+1,CLOCK_DIV_DIS); // Bypass Divider to power it down 140 162 } 141 ad9510_write_reg(0x5A, 0x01); // Update Regs163 ad9510_write_reg(0x5A, 0x01); // Update Regs 142 164 } 143 165 166 void 167 clocks_enable_test_clk(bool enable, int divisor) 168 { 169 clocks_enable_XXX_clk(enable,divisor,0x3C,0x48,CLOCK_OUT_DIS_PECL); 170 } 144 171 145 172 void 146 173 clocks_enable_rx_dboard(bool enable, int divisor) 147 174 { 148 if (enable){ 149 ad9510_write_reg(0x43, 0x08); // enable output 7 (db_rx_clk), CMOS 150 151 if (divisor == 0){ 152 ad9510_write_reg(0x57, 0x80); // Bypass Div #7, 100 MHz clock 153 } 154 else { 155 // FIXME Matt, do something with divisor... 156 } 157 } 158 else { 159 ad9510_write_reg(0x43, 0x01); // Turn off output 7 (db_rx_clk) 160 } 161 ad9510_write_reg(0x5A, 0x01); // Update Regs 175 clocks_enable_XXX_clk(enable,divisor,0x43,0x56,CLOCK_OUT_DIS_CMOS); 162 176 } 163 164 177 165 178 void 166 179 clocks_enable_tx_dboard(bool enable, int divisor) 167 180 { 168 if (enable){ 169 ad9510_write_reg(0x42, 0x08); // enable output 6 (db_tx_clk), CMOS 170 if (divisor == 0) { 171 ad9510_write_reg(0x55, 0x80); // Bypass Div #6, 100 MHz clock 172 } 173 else { 174 // FIXME Matt, do something with divisor 175 } 176 } 177 else { 178 ad9510_write_reg(0x42, 0x01); // Turn off output 6 (db_tx_clk) 179 } 180 ad9510_write_reg(0x5A, 0x01); // Update Regs 181 clocks_enable_XXX_clk(enable,divisor,0x42,0x54,CLOCK_OUT_DIS_CMOS); 181 182 } gnuradio/trunk/usrp2/firmware/lib/clocks.h
r9528 r9780 47 47 * \brief Enable or disable test clock (extra clock signal) 48 48 */ 49 void clocks_enable_test_clk(bool enable );49 void clocks_enable_test_clk(bool enable, int divisor); 50 50 51 51 /*! gnuradio/trunk/usrp2/firmware/lib/u2_init.c
r9708 r9780 67 67 clocks_init(); 68 68 69 // clocks_enable_test_clk(true );69 // clocks_enable_test_clk(true,1); 70 70 71 71 // Enable ADCs
