Changeset 9101
- Timestamp:
- 07/31/08 20:30:22
- Files:
-
- usrp2/trunk/fpga/serdes/serdes_tx.v (modified) (2 diffs)
Legend:
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usrp2/trunk/fpga/serdes/serdes_tx.v
r8610 r9101 46 46 output sent, 47 47 48 // FIFO Levels 49 output [15:0] fifo_occupied, 50 output fifo_full, 51 output fifo_empty, 52 53 // DEBUG 48 54 output [31:0] debug 49 55 ); … … 81 87 (.clk(clk),.rst(rst),.clear(0), 82 88 .datain({rd_sop_i,rd_eop_i,rd_dat_i}), .write(write), .full(full), 83 .dataout({sop_o,eop_o,data_o}), .read(read), .empty(empty) ); 89 .dataout({sop_o,eop_o,data_o}), .read(read), .empty(empty), 90 .space(), .occupied(fifo_occupied) ); 91 assign fifo_full = full; 92 assign fifo_empty = empty; 84 93 85 94 // Buffer interface to internal FIFO
