Changeset 9097
- Timestamp:
- 07/31/08 20:25:41
- Files:
-
- usrp2/trunk/fpga/eth/mac_rxfifo_int.v (modified) (2 diffs)
Legend:
- Unmodified
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usrp2/trunk/fpga/eth/mac_rxfifo_int.v
r7613 r9097 16 16 output wr_error_o, 17 17 input wr_ready_i, 18 input wr_full_i); 18 input wr_full_i, 19 20 // FIFO Status 21 output [15:0] fifo_occupied, 22 output fifo_full, 23 output fifo_empty 24 ); 19 25 20 26 // Write side of short FIFO … … 31 37 (.clk(clk),.rst(rst),.clear(0), 32 38 .datain({Rx_mac_sop,Rx_mac_eop,Rx_mac_err,Rx_mac_data}),.write(write),.full(full), 33 .dataout({sop_o,eop_o,error_o,wr_dat_o}),.read(read),.empty(empty) ); 34 39 .dataout({sop_o,eop_o,error_o,wr_dat_o}),.read(read),.empty(empty), 40 .space(), .occupied(fifo_occupied[4:0]) ); 41 assign fifo_occupied[15:5] = 0; 42 assign fifo_full = full; 43 assign fifo_empty = empty; 44 35 45 // Read side of short FIFO 36 46 // Inputs: empty, dataout, wr_ready_i, wr_full_i
