Changeset 9095
- Timestamp:
- 07/31/08 20:19:57
- Files:
-
- usrp2/trunk/fpga/sdr_lib/rx_control.v (modified) (2 diffs)
Legend:
- Unmodified
- Added
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usrp2/trunk/fpga/sdr_lib/rx_control.v
r7669 r9095 24 24 input strobe, 25 25 26 // FIFO Levels 27 output [15:0] fifo_occupied, 28 output fifo_full, 29 output fifo_empty, 30 26 31 // Debug 27 32 output [31:0] debug_rx … … 94 99 95 100 wire [33:0] fifo_line; 101 96 102 // Internal FIFO, size 9 is 2K, size 10 is 4K 97 103 cascadefifo2 #(.WIDTH(34),.SIZE(FIFOSIZE)) rxfifo 98 104 (.clk(clk),.rst(rst),.clear(clear_overrun), 99 105 .datain(fifo_line), .write(write), .full(full), 100 .dataout({sop_o,eop_o,wr_dat_o}), .read(read), .empty(empty) 101 ); 106 .dataout({sop_o,eop_o,wr_dat_o}), .read(read), .empty(empty), 107 .space(),.occupied(fifo_occupied) ); 108 assign fifo_full = full; 109 assign fifo_empty = empty; 102 110 103 111 // Internal FIFO to DSP interface
