Changeset 9094
- Timestamp:
- 07/31/08 20:19:07
- Files:
-
- usrp2/trunk/fpga/control_lib/cascadefifo.v (modified) (2 diffs)
- usrp2/trunk/fpga/control_lib/cascadefifo2.v (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
- Modified
- Copied
- Moved
usrp2/trunk/fpga/control_lib/cascadefifo.v
r7175 r9094 20 20 output full, 21 21 output empty, 22 output [15:0] fifo_space); 22 output [15:0] space, 23 output [15:0] occupied); 23 24 24 25 wire [WIDTH-1:0] data_int; 25 26 wire empty_int, full_int, transfer; 27 wire [4:0] short_space, short_occupied; 28 wire [15:0] long_space, long_occupied; 26 29 27 30 shortfifo #(.WIDTH(WIDTH)) shortfifo 28 31 (.clk(clk),.rst(rst),.clear(clear), 29 32 .datain(datain), .write(write), .full(full), 30 .dataout(data_int), .read(transfer), .empty(empty_int) ); 33 .dataout(data_int), .read(transfer), .empty(empty_int), 34 .space(short_space),.occupied(short_occupied) ); 31 35 32 36 longfifo #(.WIDTH(WIDTH),.SIZE(SIZE)) longfifo … … 34 38 .datain(data_int), .write(transfer), .full(full_int), 35 39 .dataout(dataout), .read(read), .empty(empty), 36 . fifo_space(fifo_space) );40 .space(long_space),.occupied(long_occupied) ); 37 41 38 42 assign transfer = ~empty_int & ~full_int; 39 43 44 assign space = {11'b0,short_space} + long_space; 45 assign occupied = {11'b0,short_occupied} + long_occupied; 46 40 47 endmodule // cascadefifo 41 48 usrp2/trunk/fpga/control_lib/cascadefifo2.v
r7175 r9094 17 17 output full, 18 18 output empty, 19 output [15:0] fifo_space); 19 output [15:0] space, 20 output [15:0] occupied); 20 21 21 22 wire [WIDTH-1:0] data_int, data_int2; 22 23 wire empty_int, full_int, transfer; 23 24 wire empty_int2, full_int2, transfer2; 25 wire [4:0] s1_space, s1_occupied, s2_space, s2_occupied; 26 wire [15:0] l_space, l_occupied; 24 27 25 28 shortfifo #(.WIDTH(WIDTH)) shortfifo 26 29 (.clk(clk),.rst(rst),.clear(clear), 27 30 .datain(datain), .write(write), .full(full), 28 .dataout(data_int), .read(transfer), .empty(empty_int) ); 29 31 .dataout(data_int), .read(transfer), .empty(empty_int), 32 .space(s1_space),.occupied(s1_occupied) ); 33 30 34 longfifo #(.WIDTH(WIDTH),.SIZE(SIZE)) longfifo 31 35 (.clk(clk),.rst(rst),.clear(clear), 32 36 .datain(data_int), .write(transfer), .full(full_int), 33 37 .dataout(data_int2), .read(transfer2), .empty(empty_int2), 34 . fifo_space(fifo_space) );35 38 .space(l_space),.occupied(l_occupied) ); 39 36 40 shortfifo #(.WIDTH(WIDTH)) shortfifo2 37 41 (.clk(clk),.rst(rst),.clear(clear), 38 42 .datain(data_int2), .write(transfer2), .full(full_int2), 39 .dataout(dataout), .read(read), .empty(empty) ); 40 43 .dataout(dataout), .read(read), .empty(empty), 44 .space(s2_space),.occupied(s2_occupied) ); 45 41 46 assign transfer = ~empty_int & ~full_int; 42 47 assign transfer2 = ~empty_int2 & ~full_int2; 43 48 49 assign space = {11'b0,s1_space} + {11'b0,s2_space} + l_space; 50 assign occupied = {11'b0,s1_occupied} + {11'b0,s2_occupied} + l_occupied; 51 44 52 endmodule // cascadefifo2 45 53
