Changeset 9091
- Timestamp:
- 07/31/08 20:15:00
- Files:
-
- usrp2/trunk/fpga/control_lib/shortfifo.v (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
- Modified
- Copied
- Moved
usrp2/trunk/fpga/control_lib/shortfifo.v
r8717 r9091 10 10 output reg full, 11 11 output reg empty, 12 output [ 3:0] space,13 output [ 3:0] occupied);12 output [4:0] space, 13 output [4:0] occupied); 14 14 15 15 reg [3:0] a; … … 58 58 // NOTE will fail if you write into a full fifo or read from an empty one 59 59 60 assign space = full ? 0 : empty ? 1 5: 15-a;61 assign occupied = empty ? 0 : full ? 1 5: a+1;60 assign space = full ? 0 : empty ? 16 : 15-a; 61 assign occupied = empty ? 0 : full ? 16 : a+1; 62 62 63 63 endmodule // shortfifo
