Changeset 8347

Timestamp:

05/09/08 12:35:51

Author:

eb

Message:

work-in-progress

Files:

• usrp2/trunk/firmware/include/usrp2_eth_packet.h (modified) (4 diffs)

usrp2/trunk/firmware/include/usrp2_eth_packet.h

@@ -166 +166 @@
-#define OP_READ_TIME           11       // What time is it? (100 MHz counter)
-#define OP_READ_TIME_REPLY     12       // This time.
+#define OP_CONFIG_RX_V2        13
+#define OP_CONFIG_TX_V2        14
+
-
-typedef struct {
@@ -182 +185 @@
-  uint8_t       opcode;
-  uint8_t       len;
-mbz;
+ok;                        // low bit is "OK"
-  u2_mac_addr_t addr;
-  uint16_t      hw_rev;
@@ -235 +238 @@
-  uint32_t      time;
-} op_read_time_reply_t;
+
+
+/*
+ * Configure the receiver.
+ */
+typedef struct {
+  uint8_t       opcode;
+  uint8_t       len;
+  uint16_t      rid_mbz;
+  // bitmask indicating which of the following fields are valid
+  uint16_t      valid;
+  uint16_t      gain;           // fxpt_db (Q9.7)
+  uint32_t      target_freq_hi; // high 32-bits of 64-bit fxpt_freq (Q44.20)
+  uint32_t      target_freq_lo; // low  32-bits of 64-bit fxpt_freq (Q44.20)
+  uint32_t      interp;         // desired interpolation factor (NOT -1)
+  uint32_t      scale_iq;       // (scale_i << 16) | scale_q [16.0 format]
+} op_config_rx_v2_t;
+
+// bitmask for "valid" field.  If the bit is set, there's
+// meaningful data in the corresonding field.
+
+#define CFGV_GAIN               0x0001  // gain field is valid
+#define CFGV_FREQ               0x0002  // target_freq field is valid
+#define CFGV_INTERP_DECIM       0x0004  // interp or decim is valid
+#define CFGV_SCALE_IQ           0x0008  // scale_iq is valid
+
+/*
+ * Reply to receiver configuration
+ */
+typedef struct {
+  uint8_t       opcode;
+  uint8_t       len;
+  uint16_t      rid_mbz;
+
+  uint16_t      ok;             // config was successful (bool)
+  uint16_t      inverted;       // spectrum is inverted (bool)
+
+  // RF frequency that corresponds to DC in the IF (fxpt_freq)
+  uint32_t      baseband_freq_hi;
+  uint32_t      baseband_freq_lo;
+  // DDC frequency (fxpt_freq)
+  uint32_t      ddc_freq_hi;
+  uint32_t      ddc_freq_lo;
+  // residual frequency (fxpt_freq)
+  uint32_t      residual_freq_hi;
+  uint32_t      residual_freq_lo;
+
+} op_config_rx_v2_reply_t;
+
+typedef struct {
+  uint8_t       opcode;
+  uint8_t       len;
+  uint16_t      rid_mbz;
+  // bitmask indicating which of the following fields are valid
+  uint16_t      valid;
+  uint16_t      gain;           // fxpt_db (Q9.7)
+  uint32_t      freq_hi;        // high 32-bits of 64-bit fxpt_freq (Q44.20)
+  uint32_t      freq_lo;        // low  32-bits of 64-bit fxpt_freq (Q44.20)
+  uint32_t      decim;          // desired decimation factor (NOT -1)
+  uint32_t      scale_iq;       // (scale_i << 16) | scale_q [16.0 format]
+} op_config_tx_v2_t;
+
-
-
@@ -249 +314 @@
-  op_read_time_t        op_read_time;
-  op_read_time_reply_t  op_read_time_reply;
+  op_config_rx_v2_t     op_config_rx_v2;
+  op_config_tx_v2_t     op_config_tx_v2;
-} u2_subpkt_t;
-