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Revision 3133
(checked in by eb, 2 years ago)
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Cleaned up top-level README, and fixed or deleted lower level ones as
appropriate.
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- Property svn:eol-style set to
native
- Property svn:keywords set to
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# |
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# README -- the short version |
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# |
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The top level makefile handles the host code and FX2 firmware. |
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Besides the normal gcc suite and all the auto tools, you'll need |
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the SDCC free C compiler to build the firmware. You MUST |
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USE VERSION 2.4.0 or VERSION 2.5.0 due to some problems with variable |
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initialization. http://sdcc.sourceforge.net |
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The high level interface to the USRP using our standard FPGA bitstram |
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is contained in usrp/host/lib/usrp_standard.h |
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If you've got doxygen installed, there are html docs in |
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usrp/doc/html/index.html |
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# Compiling the verilog (not required unless you're modifying it) |
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If you want to build the FPGA .rbf file from source (not required; we |
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provide pre-compiled .rbf files in usrp/fpga/rbf directory), you'll |
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need Altera's no cost Quartus II development tools. We're currently |
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building with Quartus II 5.1sp1 Web Edition. The project file is |
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usrp/fpga/toplevel/usrp_std/usrp_std.qpf. The toplevel verilog file |
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is usrp/fpga/toplevel/usrp_std/usrp_std.v. The bulk of the verilog |
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modules are contained in usrp/fpga/sdr_lib |
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