root/gnuradio/tags/releases/3.0.3rc2/gr-usrp/ChangeLog

2006-06-17  Eric Blossom  <eb@comsec.com>

        * src/usrp.py, src/usrp1.i, src/usrp1_sink_base.cc, src/usrp1_sink_base.h,
        src/usrp1_sink_c.cc, src/usrp1_sink_c.h, src/usrp1_sink_s.cc,
        src/usrp1_sink_s.h, src/usrp1_source_base.cc, src/usrp1_source_base.h,
        src/usrp1_source_c.cc, src/usrp1_source_c.h, src/usrp1_source_s.cc,
        src/usrp1_source_s.h: changed constructor args to add
        fusb_block_size and fusb_nblocks so that the application can
        adjust the amount of buffering being done.  [This was an awful lot
        of files to have to touch to make this change.  There must be an
        easier way?]


2006-05-11  Martin Dudok van Heel <nldudok1 at olifantasia dot com>
        Added synchronised multi_usrp support. 
        This work was funded by Toby Oliver at Sensus Analytics / Path Intelligence.

        See README_MULTI_USRP.txt and the multi_usrp examples on how to use.
        In short:  
        Connect the 64MHz clocks between the boards with a short sma coax cable.
        (See the wiki on how to enable clock-out and clock-in 
         http://comsec.com/wiki?USRPClockingNotes )
        Connect io15 on the RXA daughterboards of both usrps
        instantiate multi=usrp_multi.multi_source_align([args])
        The 4 aligned channels become available as:
        (multi.get_master_source_c(),1) (multi.get_master_source_c(),2)
        (multi.get_slave_source(),1) (multi.get_slave_source(),2)
        call multi.sync() at least once AFTER the flowgraph has started running

        * READMU_MULTI_USRP.txt: new
        * configure.ac: added missing newline at end of file
        * src/Makefile.am: added usrp_multi.py
        * src/usrp1.i: added _write_fpga_reg_masked
        * src/usrp1_source_base.[cc,h]: added _write_fpga_reg_masked
        * src/usrp_multi.py: new Instantiate a usrp_multi.multi_source_align to
                                get aligned streams from two usrps. 

2006-03-11  Matt Ettus  <matt@ettus.com>

        * src/Makefile.am, src/db_flexrf_mimo.py, src/usrp.py:  New skeleton 
        file for mimo mode with the flexrf boards

        * src/db_base.py:  added standard code to control refclock and
        adc buffer bypass so all dboards can do it the same way.  Taken from
        db_dbs_rx.py

        * src/db_tv_rx.py:  Use standard method for adc buffer bypass

        * src/db_flexrf.py:  Use standard method for adc buffer bypass

        * src/db_dbs_rx.py:  Use standard methods for adc buffer bypass and
        refclock control

        * src/db_basic.py:  Use standard method for adc buffer bypass,
        and instantiate a BasicTX when the unknown or missing board is on
        the TX side

2006-03-10  Eric Blossom  <eb@comsec.com>

        * src/db_dbs_rx.py (db_dbs_rx._refclk_freq): replaced 64e6 with
        call to fpga_master_clock_freq().

2006-02-18  Eric Blossom  <eb@comsec.com>

        * src/usrp1_{sink,source}_{base,c,s}.{h,cc}, src/usrp1.i,
        src/usrp.py: added support for specifying the firmware and fpga
        files that are to be loaded.

2006-02-17  Eric Blossom  <eb@comsec.com>

        * src/usrp1.i, src/usrp1_{sink,source}_base.{h,cc}: added serial_number()

2006-01-30  Eric Blossom  <eb@comsec.com>

        * src/db_base.py, src/db_flexrf.py: revised to use new auto t/r
        switching strategy.  FR_ATR_CTL no longer exists.  We control auto
        t/r via the FR_ATR_MASK* registers.

2006-01-25  Eric Blossom  <eb@comsec.com>

        * src/usrp.py (usrp_common): added code to read FPGA capability register.
        (determine_tx_mux_value): new utility.

2006-01-22  Eric Blossom  <eb@comsec.com>

        * src/usrp.py (pick_rx_subdevice): added latest d'board revs to list.

2006-01-04  Eric Blossom  <eb@comsec.com>

        * src/usrp1_{sink,source}_{s,c}.cc: added usrp_bytesex.h include and
        use usrp_to_host_short or host_to_usrp_short as appropriate to
        handle usrp to host endianness differences.
        
        * configure.ac: added AC_C_BIGENDIAN and header check for byteswap.h

2005-12-20  Matt Ettus  <matt@ettus.com>

        * src/db_base.py (db_base.spectrum_inverted): Base function
        defaults to no spectrum inversion, so we can handle daughterboards
        which have analog spectra which are inverted (currently only tvrx2)
        
        * src/db_tv_rx.py (db_tv_rx.spectrum_inverted): Report that the
        tvrx2 has inverted spectrum, the tvrx does not

        * src/usrp.py (tune): Handle daughterboards which have analog
        spectra which are inverted (currently only tvrx2)
        

2005-12-08  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_s.cc (usrp1_sink_s): call set_output_multiple so
        we ensure 512 byte writes across USB.

2005-12-07  Eric Blossom  <eb@comsec.com>

        * src/usrp.py: revised sink_c, sink_s, source_c and source_s to
        properly fire daughterboard destructors.  Without this, we had the
        nasty habit of leaving the transmitter running if the user didn't
        explicitly disable it.

2005-12-05  Eric Blossom  <eb@comsec.com>

        * src/db_base.py, src/db_flexrf.py: refactored to use new
        Auto T/R switching.

        * src/db_flexrf.py (flexrf_base.set_freq): Offset the LO by 4 MHz.
        Helps initial lock-up time with discontinuous transmission.

2005-11-22  Eric Blossom  <eb@comsec.com>

        * src/db_base.py, src/db_flexrf.py: renamed set_auto_tx to set_auto_tr.

2005-11-17  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.cc: reduced amount of USB Tx buffering.

2005-11-13  Eric Blossom  <eb@comsec.com>

        * src/db_base.py (db_base.set_auto_tx): new stub method.

2005-11-11  Eric Blossom  <eb@comsec.com>

        * src/usrp.py (pick_rx_subdevice): moved to library.

2005-11-10  Matt Ettus  <matt@ettus.com>

        * src/db_flexrf.py (flexrf_base_tx.set_enable): fixed definition.

2005-10-27  Eric Blossom  <eb@comsec.com>

        * src/db_base.py, src/db_flexrf.py: new method: set_enable

2005-10-20  Eric Blossom  <eb@comsec.com>

        * src/usrp1_source_s.{h,cc}, src/usrp1_source_c.{h,cc}: support
        both 8 and 16-bit samples across the USB.
        * src/usrp1.i, src/usrp1_source_base.{h,cc}: new methods for
        setting and getting rx format.

2005-10-11  Eric Blossom  <eb@comsec.com>

        * src/usrp.py: removed dispatch on usrp revision (no longer
        support rev0 boards).  Constructors now take keyword args, thus
        all args are optional.  This will allow us to get rid of the 64e6's
        and 128e6's that are scattered throughout the example code.
        * src/usrp1.i: removed default values from constructors.  They are
        now provided by keyword args in usrp.py

2005-09-29  Eric Blossom  <eb@comsec.com>

        * src/db_dbs_rx.py (db_dbs_rx.freq_range): set freq step size to 1M

2005-09-27  Eric Blossom  <eb@comsec.com>

        * src/db_base.py (db_base.i_and_q_swapped): new method for 
        Flex 400 Rx and other boards that route I into ADC 1 instead of 0.

        * src/usrp.py (tune): added tune fct.  Reworked subdev_spec.  No
        longer accepts (0|1, None).  Check for and handle i_and_q_swapped.

2005-09-21  Eric Blossom  <eb@comsec.com>

        * src/db_basic.py: new.
        * src/db_instantiator.py, src/usrp.py:  added framework for
        automatically instantiating daughterboard subclasses.
        
        * src/usrp1.i, src/usrp1_sink_base.{h,cc},
        src/usrp1_source_base.{h,cc}: deprecated adc_freq(), dac_freq(),
        recommend converter_rate().
        
2005-09-17  Eric Blossom  <eb@comsec.com>

        * src/db_dbs_rx.py: renamed from dbs_rx.py
        * src/db_flexrf.py: renamed from flexrf.py
        * src/db_tv_rx.py: renamed from tv_rx.py
        * src/db_base.py: renamed from daughterboard_base.py

2005-08-28  Eric Blossom  <eb@comsec.com>

        * src/flexrf.py: added hook to invoke debugging gui.
        * src/flexrf_debug_gui.py: new debugging tool.

2005-07-19  Eric Blossom  <eb@comsec.com>

        * src/usrp1_source_base.{h,cc}, src/usrp1.i: new method: set_ddc_phase.

2005-07-02  Eric Blossom  <eb@comsec.com>

        * config/gr_no_undefined.m4, config/gr_x86_64.m4: new, x86_64 support.
        * config/gr_python.m4: backed out search for libpython, making
        x86_64 work and breaking Cygwin/MinGW.
        * configure.ac, src/Makefile.am: mods for x86_64, $(NO_UNDEFINED)
        
2005-06-09  Eric Blossom  <eb@comsec.com>

        * src/gen_usrp_dbids.py: new.  Generate usrp_dbids.py from
        usrp_daughterboards.h.  This file contains symbolic names for for
        daughterboard ID's.

2005-05-18  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.{h,cc}, src/usrp1_source_base.{h,cc}: use
        new start/stop methods.

2005-05-09  Stephane Fillod  <f8cfe@free.fr>

        * config/gr_sysv_shm.m4: SysV shared memory not mandatory
        * config/gr_pwin32.m4, config/gr_python.m4, config/lf_cxx.m4:
          fixes for Cygwin, MinGW

2005-03-29  Eric Blossom  <eb@comsec.com>

        * src/usrp.py: now check for usrp version at open time, not import
        time.

2005-03-15  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.{h,cc}, src/usrp1_source_base.{h,cc}:
        read_aux_dac and write_aux_dac now take which_dboard instead of slot.

2005-03-13  Matt Ettus <matt@ettus.com>

        * src/Makefile.am, src/tv_rx.py: first cut at TV RX dboard
        * src/dbs_rx.py: minor fixes

2005-03-11  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.{h,cc},src/usrp1_source_base.{h,cc}: new
        methods: set_adc_offset, set_dac_offset, set_adc_buffer_bypass.

2005-02-18  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.cc (_write_oe): fix delegation.
        * src/usrp1_source_base.cc (_write_oe): fix delegation.

2005-02-16  Eric Blossom  <eb@comsec.com>

        * src/dbs_rx.py: new. control DBS_RX daughterboard.
        * src/usrp1_{sink,source}_base.{h,cc}: add read_i2c and write_i2c.
        
2005-02-06  Eric Blossom  <eb@comsec.com>

        * configure.ac: upped rev to 0.4 for release.
        * src/Makefile.am: backed out dependency on libpython

2005-01-28  Stephane Fillod <f8cfe@free.fr>

        * src/Makefile.am: fixes for MinGW.
        
2005-01-12  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.cc,src/usrp1_source_base.cc: changed
        under/overrun diagnostic indicator to "uU" and "uO" to reduce
        amount of diagnostic output.

2005-01-10  Eric Blossom  <eb@comsec.com>

        * src/usrp1.i,src/usrp1_sink_base.{h,cc},
        src/usrp1_source_base.{h,cc}: new methods to control all knobs.

2005-01-04  Eric Blossom  <eb@comsec.com>

        * src/usrp1.i,src/usrp1_source_base.{h,cc}: new methods for
        messing with Rx PGA. 

2004-11-14  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.cc (work): corrected increment of obi.

2004-10-13  Eric Blossom  <eb@comsec.com>

        * configure.ac: upped rev to 0.2cvs

2004-10-11  Eric Blossom  <eb@comsec.com>

        * configure.ac: bumped rev to 0.2, make release.
        * Makefile.am (EXTRA_DIST): added config.h.in

2004-09-30  Eric Blossom  <eb@comsec.com>

        * src/usrp1_sink_base.{h,cc}, src/usrp1_source_base.{h,cc},
        src/usrp1.i: new methods for reading and writing aux dac and adc,
        eeproms, and fpga registers.

2004-09-23  Eric Blossom  <eb@comsec.com>

        * config/usrp_fusb_tech.m4, config/bnv_have_qt.m4, config/cppunit.m4,
        config/gr_check_mc4020.m4, config/gr_check_usrp.m4, config/gr_doxygen.m4,
        config/gr_gprof.m4, config/gr_scripting.m4, config/gr_set_md_cpu.m4,
        config/pkg.m4, config/usrp_fusb_tech.m4: added additional quoting
        to first arg of AC_DEFUN to silence automake warning.

2004-08-19  Eric Blossom  <eb@comsec.com>

        * src/usrp1_{sink,source}_base.{h,cc}, src/usrp1.i: new method: set_verbose.

2004-08-03  Eric Blossom  <eb@comsec.com>

        * src/usrp1_source_base.{h,cc}, src/usrp1_sink_base.{h,cc}:
        extracted base class that handles everything but the packing and
        unpacking of data into the usrp buffer.
        * src/usrp1_source_c.{h,cc}, src/usrp1_sink_c.{h,cc}: revised to
        use new base class.
        * src/usrp1_source_s.{h,cc}, src/usrp1_sink_s.{h,cc}: new.
        

2004-07-31  Eric Blossom  <eb@comsec.com>

        * src/usrp1_{sink,source}_c.{h,cc}: new method: set_loopback
        * src/usrp1.i: new method: set_loopback

2004-07-30  Eric Blossom  <eb@comsec.com>

        * src/usrp1_source_c.{h,cc}: renamed from usrp_source_c.{h,cc}
        * src/usrp1_sink_c.{h,cc}: renamed from usrp_sink_c.{h,cc}
        * src/usrp1.i: renamed from usrp.i
        * src/usrp.py: new.  Binds proper class depending on hardware found.
        

2004-07-29  Eric Blossom  <eb@comsec.com>

        * src/usrp_{sink,source}_c.h: doc fix.
        * src/usrp0.i: new
        * src/usrp0_source_c.{h,cc}: new
        * src/usrp0_sink_c.{h,cc}: new

2004-07-12  Eric Blossom  <eb@comsec.com>

        * configure.ac: upped rev to 0.1cvs

2004-07-08  Eric Blossom  <eb@comsec.com>

        * src/usrp_source_c.{h,cc}: new.

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