root / usrp2 / fpga / simple_gemac / flow_ctrl_tx.v @ c1950e29
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| 1 | |
|---|---|
| 2 | // TX side of flow control -- when other side sends PAUSE, we wait |
| 3 | |
| 4 | module flow_ctrl_tx |
| 5 | (input rst, |
| 6 | input tx_clk, |
| 7 | //host processor |
| 8 | input tx_pause_en, |
| 9 | // From MAC_rx_ctrl |
| 10 | input [15:0] pause_quanta, |
| 11 | input pause_quanta_val, |
| 12 | // MAC_tx_ctrl |
| 13 | output pause_apply, |
| 14 | input pause_quanta_sub); |
| 15 | |
| 16 | // ****************************************************************************** |
| 17 | // Inhibit our TX from transmitting because they sent us a PAUSE frame |
| 18 | // ****************************************************************************** |
| 19 | |
| 20 | reg [15:0] pause_quanta_counter; |
| 21 | reg pqval_d1, pqval_d2; |
| 22 | |
| 23 | always @(posedge tx_clk) pqval_d1 <= pause_quanta_val; |
| 24 | always @(posedge tx_clk) pqval_d2 <= pqval_d1; |
| 25 | |
| 26 | always @ (posedge tx_clk or posedge rst) |
| 27 | if (rst) |
| 28 | pause_quanta_counter <= 0; |
| 29 | else if (pqval_d1 & ~pqval_d2) |
| 30 | pause_quanta_counter <= pause_quanta; |
| 31 | else if((pause_quanta_counter!=0) & pause_quanta_sub) |
| 32 | pause_quanta_counter <= pause_quanta_counter - 1; |
| 33 | |
| 34 | assign pause_apply = tx_pause_en & (pause_quanta_counter != 0); |
| 35 | |
| 36 | endmodule // flow_ctrl |