root / usrp2 / firmware / lib / sd.h @ 8056ff42
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| 1 | ad482436 | matt | /* -*- c -*- */
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| 2 | ad482436 | matt | /*
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| 3 | ad482436 | matt | * Copyright 2008 Ettus Research LLC |
| 4 | ad482436 | matt | * |
| 5 | ad482436 | matt | * This program is free software: you can redistribute it and/or modify |
| 6 | ad482436 | matt | * it under the terms of the GNU General Public License as published by |
| 7 | ad482436 | matt | * the Free Software Foundation, either version 3 of the License, or |
| 8 | ad482436 | matt | * (at your option) any later version. |
| 9 | ad482436 | matt | * |
| 10 | ad482436 | matt | * This program is distributed in the hope that it will be useful, |
| 11 | ad482436 | matt | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ad482436 | matt | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ad482436 | matt | * GNU General Public License for more details. |
| 14 | ad482436 | matt | * |
| 15 | ad482436 | matt | * You should have received a copy of the GNU General Public License |
| 16 | ad482436 | matt | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 17 | ad482436 | matt | */ |
| 18 | ad482436 | matt | |
| 19 | ad482436 | matt | #ifndef INCLUDED_SD_H
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| 20 | ad482436 | matt | #define INCLUDED_SD_H
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| 21 | ad482436 | matt | |
| 22 | ad482436 | matt | #include "memory_map.h" |
| 23 | ad482436 | matt | |
| 24 | ad482436 | matt | #define SD_READY 1 |
| 25 | ad482436 | matt | #define SD_IDLE_WAIT_MAX 100 |
| 26 | ad482436 | matt | #define SD_CMD_TIMEOUT 100 |
| 27 | ad482436 | matt | #define SD_RD_TIMEOUT 1000 |
| 28 | ad482436 | matt | |
| 29 | ad482436 | matt | #define SD_CMD0 0 |
| 30 | ad482436 | matt | #define SD_CMD1 1 |
| 31 | ad482436 | matt | #define SD_CMD9 9 |
| 32 | ad482436 | matt | #define SD_CMD10 10 |
| 33 | ad482436 | matt | #define SD_CMD12 12 |
| 34 | ad482436 | matt | #define SD_CMD13 13 |
| 35 | ad482436 | matt | #define SD_CMD16 16 |
| 36 | ad482436 | matt | #define SD_CMD17 17 |
| 37 | ad482436 | matt | #define SD_CMD18 18 |
| 38 | ad482436 | matt | #define SD_CMD24 24 |
| 39 | ad482436 | matt | #define SD_CMD25 25 |
| 40 | ad482436 | matt | #define SD_CMD27 27 |
| 41 | ad482436 | matt | #define SD_CMD28 28 |
| 42 | ad482436 | matt | #define SD_CMD29 29 |
| 43 | ad482436 | matt | #define SD_CMD30 30 |
| 44 | ad482436 | matt | #define SD_CMD32 32 |
| 45 | ad482436 | matt | #define SD_CMD33 33 |
| 46 | ad482436 | matt | #define SD_CMD38 38 |
| 47 | ad482436 | matt | #define SD_CMD55 55 |
| 48 | ad482436 | matt | #define SD_CMD58 58 |
| 49 | ad482436 | matt | #define SD_CMD59 59 |
| 50 | ad482436 | matt | #define SD_ACMD41 41 |
| 51 | ad482436 | matt | #define SD_IDLE 0xFF |
| 52 | ad482436 | matt | #define SD_CRC 0x95 |
| 53 | ad482436 | matt | |
| 54 | ad482436 | matt | #define SD_R1 1 |
| 55 | ad482436 | matt | #define SD_R1B 2 |
| 56 | ad482436 | matt | #define SD_R2 3 |
| 57 | ad482436 | matt | #define SD_R3 4 |
| 58 | ad482436 | matt | |
| 59 | ad482436 | matt | #define SD_CMD0_R SD_R1
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| 60 | ad482436 | matt | #define SD_CMD16_R SD_R1
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| 61 | ad482436 | matt | #define SD_CMD17_R SD_R1
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| 62 | ad482436 | matt | #define SD_CMD55_R SD_R1
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| 63 | ad482436 | matt | #define SD_ACMD41_R SD_R1
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| 64 | ad482436 | matt | #define SD_CMD58_R SD_R3
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| 65 | ad482436 | matt | |
| 66 | ad482436 | matt | #define SD_BLOCKLEN 512 |
| 67 | ad482436 | matt | #define SD_BLOCKLEN_NBITS 9 |
| 68 | ad482436 | matt | |
| 69 | ad482436 | matt | #define SD_MSK_IDLE 0x01 |
| 70 | ad482436 | matt | #define SD_MSK_OCR_33 0xC0 |
| 71 | ad482436 | matt | #define SD_MSK_TOK_DATAERROR 0xE0 |
| 72 | ad482436 | matt | |
| 73 | ad482436 | matt | |
| 74 | ad482436 | matt | int sd_init(void); |
| 75 | ad482436 | matt | |
| 76 | ad482436 | matt | static inline void |
| 77 | ad482436 | matt | sd_assert_cs(void)
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| 78 | ad482436 | matt | {
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| 79 | ad482436 | matt | // Wait for idle before doing anything
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| 80 | ad482436 | matt | while(sdspi_regs->status != SD_READY)
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| 81 | ad482436 | matt | ; |
| 82 | ad482436 | matt | sdspi_regs->status = 1;
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| 83 | ad482436 | matt | } |
| 84 | ad482436 | matt | |
| 85 | ad482436 | matt | static inline void |
| 86 | ad482436 | matt | sd_deassert_cs(void)
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| 87 | ad482436 | matt | {
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| 88 | ad482436 | matt | // Wait for idle before doing anything
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| 89 | ad482436 | matt | while(sdspi_regs->status != SD_READY)
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| 90 | ad482436 | matt | ; |
| 91 | ad482436 | matt | sdspi_regs->status = 0;
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| 92 | ad482436 | matt | } |
| 93 | ad482436 | matt | |
| 94 | ad482436 | matt | static inline char |
| 95 | ad482436 | matt | sd_rcv_byte(void)
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| 96 | ad482436 | matt | {
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| 97 | ad482436 | matt | // Wait for idle before doing anything
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| 98 | ad482436 | matt | while(sdspi_regs->status != SD_READY)
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| 99 | ad482436 | matt | ; |
| 100 | ad482436 | matt | sdspi_regs->send_dat = SD_IDLE; |
| 101 | ad482436 | matt | while(sdspi_regs->status != SD_READY)
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| 102 | ad482436 | matt | ; |
| 103 | ad482436 | matt | return sdspi_regs-> receive_dat;
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| 104 | ad482436 | matt | } |
| 105 | ad482436 | matt | |
| 106 | ad482436 | matt | static inline void |
| 107 | ad482436 | matt | sd_send_byte(char dat)
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| 108 | ad482436 | matt | {
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| 109 | ad482436 | matt | // Wait for idle before doing anything
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| 110 | ad482436 | matt | while(sdspi_regs->status != SD_READY)
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| 111 | ad482436 | matt | ; // Wait for status = 1 (ready)
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| 112 | ad482436 | matt | sdspi_regs->send_dat = dat; |
| 113 | ad482436 | matt | } |
| 114 | ad482436 | matt | |
| 115 | ad482436 | matt | |
| 116 | ad482436 | matt | int sd_send_command(unsigned char cmd,unsigned char response_type, |
| 117 | ad482436 | matt | unsigned char *response,unsigned char *argument); |
| 118 | ad482436 | matt | |
| 119 | ad482436 | matt | int sd_read_block (unsigned int blockaddr, unsigned char *buf); |
| 120 | ad482436 | matt | int sd_write_block(unsigned int blockaddr, const unsigned char *buf); |
| 121 | ad482436 | matt | |
| 122 | ad482436 | matt | #endif /* INCLUDED_SD_H */ |