Revision 3e0fb6a5
| b/gr-usrp/src/db_wbx.py | ||
|---|---|---|
| 510 | 510 |
if(div == divisor): |
| 511 | 511 |
self.aux_div = val |
| 512 | 512 |
|
| 513 |
self._u.write_io(self._which, ((self.main_div<<SELA0) | (self.aux_div<<SELB0)), |
|
| 514 |
(SELA0|SELA1|SELB0|SELB1)) # only works on RX |
|
| 513 |
self._u._rx_write_io(self._which, ((self.main_div<<SELA0) | (self.aux_div<<SELB0)),
|
|
| 514 |
(SELA0|SELA1|SELB0|SELB1)) # only works on RX
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|
| 515 | 515 |
|
| 516 |
def set_freq(self, freq): |
|
| 517 |
#freq += self._lo_offset |
|
| 518 |
|
|
| 519 |
if(freq < 20e6 or freq > 1200e6): |
|
| 520 |
raise ValueError, "Requested frequency out of range" |
|
| 521 |
div = 1 |
|
| 522 |
lo_freq = freq * 2 |
|
| 523 |
while freq < 1e9 and div < 8: |
|
| 524 |
div = div * 2 |
|
| 525 |
lo_freq = lo_freq * 2 |
|
| 526 |
print "For RF freq of %f, we set DIV=%d and LO Freq=%f" % (freq, div, lo_freq) |
|
| 527 |
self.set_divider('main', div)
|
|
| 528 |
self.set_divider('aux', 2)
|
|
| 529 |
|
|
| 530 |
R, N, control, actual_freq = self._compute_regs(freq) |
|
| 531 |
if R==0: |
|
| 532 |
return(False,0) |
|
| 533 |
self._write_all(R, N, control) |
|
| 534 |
return (self._lock_detect(), actual_freq) |
|
| 535 |
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| 536 |
|
|
| 516 | 537 |
#------------------------------------------------------------ |
| 517 | 538 |
class db_wbx_lo_tx(_lo_common, wbx_base_tx): |
| 518 | 539 |
def __init__(self, usrp, which): |
| ... | ... | |
| 574 | 595 |
db_instantiator.add(usrp_dbid.WBX_LO_RX, lambda usrp, which : (db_wbx_lo_rx(usrp, which),)) |
| 575 | 596 |
|
| 576 | 597 |
|
| 577 |
# freq += self._lo_offset |
|
| 578 |
# |
|
| 579 |
# R, N, control, actual_freq = self._compute_regs(freq) |
|
| 580 |
# if R==0: |
|
| 581 |
# return(False,0) |
|
| 582 |
# self._write_all(R, N, control) |
|
| 583 |
# return (self._lock_detect(), actual_freq) |
|
| 584 |
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