Implement closed loop AGC for USRP1
|Assignee:||Matt Ettus||% Done:||
We need to implement a few types of AGC, and have them run a sufficiently tight control loop. We should accept input from all or any of these inputs:
- RSSI on RFX cards
- Post-ADC / Pre-DDC power levels
- Post DDC power levels
We should control the gain using the strategies implemented in the daughterboard code. I.e., controlling gain on the d'board if possible and/or the AD9862 Rx PGA.
We should also look at implementing these in the FPGA, with the current gain/level reported in-band across the USB.